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74LVCH16901DGGRG4 Scheda tecnica(PDF) 4 Page - Texas Instruments |
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74LVCH16901DGGRG4 Scheda tecnica(HTML) 4 Page - Texas Instruments |
4 / 13 page www.ti.com A-Port Parity Generate and Check B Data B-Port Parity Generate and Check A Data 18-Bit Storage 18-Bit Storage 18 18 18 18 2 2 LEAB 1CLKENAB 2CLKENAB CLKAB OEAB 1A1-1A8 1APAR 1ERRB 2A1-2A8 2APAR 2ERRB ODD/EVEN SEL OEBA 1B1-1B8 1BPAR 1ERRA 2B1-2B8 2BPAR 2ERRA 1CLKENBA 2CLKENBA CLKBA LEBA QA QB Absolute Maximum Ratings (1) SN74LVCH16901 18-BIT UNIVERSAL BUS TRANSCEIVER WITH PARITY GENERATORS/CHECKERS SCES145C – OCTOBER 1998 – REVISED JUNE 2005 FUNCTIONAL BLOCK DIAGRAM over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 6.5 V VI Input voltage range(2) –0.5 6.5 V VO Voltage range applied to any output in the high-impedance or power-off state(2) –0.5 6.5 V VO Voltage range applied to any output in the high or low state(2)(3) –0.5 VCC + 0.5 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA Continuous current through each VCC or GND ±100 mA θ JA Package thermal impedance(4) 55 °C/W Tstg Storage temperature range –65 150 °C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. (3) The value of VCC is provided in the recommended operating conditions table. (4) The package thermal impedance is calculated in accordance with JESD 51-7. 4 Not Recommended For New Designs |
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