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74ALVC125 Scheda tecnica(PDF) 9 Page - NXP Semiconductors |
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74ALVC125 Scheda tecnica(HTML) 9 Page - NXP Semiconductors |
9 / 16 page 2002 Nov 18 9 Philips Semiconductors Product specification Quad buffer/line driver; 3-state 74ALVC125 handbook, full pagewidth VEXT VCC VI VO MNA616 D.U.T. CL RT RL RL PULSE GENERATOR Fig.7 Load circuitry for switching times. Definitions for test circuit RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VCC VI CL RL VEXT tPLH/tPHL tPZH/tPHZ tPZL/tPLZ 1.65 to 1.95 V VCC 30 pF 1 k Ω open GND 2 × VCC 2.3 to 2.7 V VCC 30 pF 500 Ω open GND 2 × VCC 2.7 V 2.7 V 50 pF 500 Ω open GND 6 V 3.0 to 3.6 V 2.7 V 50 pF 500 Ω open GND 6 V |
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Descrizione simile - 74ALVC125 |
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