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AM5718 Scheda tecnica(PDF) 10 Page - Texas Instruments |
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AM5718 Scheda tecnica(HTML) 10 Page - Texas Instruments |
10 / 388 page 10 AM5718, AM5716 SPRS957A – MARCH 2016 – REVISED JUNE 2016 www.ti.com Submit Documentation Feedback Terminal Configuration and Functions Copyright © 2016, Texas Instruments Incorporated 18 - AM5718 16 - AM5716 5. MUXMODE: Multiplexing mode number: (a) MUXMODE 0 is the primary mode; this means that when MUXMODE=0 is set, the function mapped on the pin corresponds to the name of the pin. The primary muxmode is not necessarily the default muxmode. NOTE The default mode is the mode at the release of the reset; also see the RESET REL. MUXMODE column. (b) MUXMODE 1 through 15 are possible muxmodes for alternate functions. On each pin, some muxmodes are effectively used for alternate functions, while some muxmodes are not used. Only MUXMODE values which correspond to defined functions should be used. 6. TYPE: Signal type and direction: – I = Input – O = Output – IO = Input or Output – D = Open drain – DS = Differential Signaling – A = Analog – PWR = Power – GND = Ground – CAP = LDO Capacitor 7. BALL RESET STATE: The state of the terminal at power-on reset: – drive 0 (OFF): The buffer drives VOL (pulldown or pullup resistor not activated). – drive 1 (OFF): The buffer drives VOH (pulldown or pullup resistor not activated). – OFF: High-impedance – PD: High-impedance with an active pulldown resistor – PU: High-impedance with an active pullup resistor 8. BALL RESET REL. STATE: The state of the terminal at the deactivation of the rstoutn signal (also mapped to the PRCM SYS_WARM_OUT_RST signal). – drive 0 (OFF): The buffer drives VOL (pulldown or pullup resistor not activated). – drive clk (OFF): The buffer drives a toggling clock (pulldown or pullup resistor not activated). – drive 1 (OFF): The buffer drives VOH (pulldown or pullup resistor not activated). – OFF: High-impedance – PD: High-impedance with an active pulldown resistor – PU: High-impedance with an active pullup resistor NOTE For more information on the CORE_PWRON_RET_RST reset signal and its reset sources, see the Power, Reset, and Clock Management / PRCM Reset Management Functional Description section of the Device TRM. 9. BALL RESET REL. MUXMODE: This muxmode is automatically configured at the release of the rstoutn signal (also mapped to the PRCM SYS_WARM_OUT_RST signal). 10. IO VOLTAGE VALUE: This column describes the IO voltage value (VDDS supply). 11. POWER: The voltage supply that powers the terminal IO buffers. |
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