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DAC0830 Scheda tecnica(PDF) 10 Page - National Semiconductor (TI) |
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DAC0830 Scheda tecnica(HTML) 10 Page - National Semiconductor (TI) |
10 / 28 page DAC0830 Series Application Hints (Continued) The ILE pin is an active high chip select which can be decoded from the address bus as a qualifier for the normal CS signal generated during a write operation. This can be used to provide a higher degree of decoding unique control signals for a particular DAC, and thereby create a more efficient addressing scheme. Another useful application of the ILE pin of each DAC in a multiple DAC system is to tie these inputs together and use this as a control line that can effectively “freeze” the outputs of all the DAC’s at their present value. Pulling this line low latches the input register and prevents new data from being written to the DAC. This can be particularly useful in multi- processing systems to allow a processor other than the one controlling the DAC’s to take over control of the data bus and control lines. If this second system were to use the same addresses as those decoded for DAC control (but for a different purpose) the ILE function would prevent the DAC’s from being erroneously altered. In a “Stand-Alone” system the control signals are generated by discrete logic. In this case double-buffering can be con- trolled by simply taking CS and XFER to a logic “0”, ILE to a logic “1” and pulling WR 1 low to load data to the input latch. 00560835 *TIE TO LOGIC 1 IF NOT NEEDED (SEE SEC. 1.1). FIGURE 2. Controlling Mutiple DACs 00560836 FIGURE 3. www.national.com 10 |
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