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STK20C04 Scheda tecnica(PDF) 3 Page - List of Unclassifed Manufacturers |
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STK20C04 Scheda tecnica(HTML) 3 Page - List of Unclassifed Manufacturers |
3 / 8 page STK20C04 2-41 SYMBOLS STK20C04-30 STK20C04-35 STK20C04-45 NO. PARAMETER UNITS READ CYCLES #1 & #2 (VCC = 5.0V ± 10%) Note c: Bringing E high will not produce standby currents until any nonvolatile cycle in progress has timed out. See MODE SELECTION table. Note e: Parameter guaranteed but not tested. Note f: NE must be high during entire cycle. Note g: For READ CYCLE #1 and #2, W and NE must be high for entire cycle. Note h: Device is continuously selected with E low and G low. Note i: Measured ± 200mV from steady state output voltage. READ CYCLE #1 f,g,h W DQ (Data Out) ADDRESS DATA VALID 5 tAXQX 11A tWHQV 2 tAVAVR 3 tAVQV READ CYCLE #2 f,g ADDRESS E G DQ (Data Out) DATA VALID ICC W 2 tAVAVR 1 tELQV 6 tELQX 4 tGLQV 8 tGLQX 11 tEHICCL 7 tEHQZ 9 tGHQZ 10 tELICCH 11A tWHQV ACTIVE STANDBY 1tELQV tACS Chip Enable Access Time 30 35 45 ns 2tAVAVR g tRC Read Cycle Time 30 35 45 ns 3tAVQV h tAA Address Access Time 30 35 45 ns 4tGLQV tOE Output Enable to Data Valid 15 20 25 ns 5tAXQX tOH Output Hold After Address Change 5 5 5 ns 6tELQX tLZ Chip Enable to Output Active 5 5 5 ns 7tEHQZ i tHZ Chip Disable to Output Inactive 18 20 25 ns 8tGLQX tOLZ Output Enable to Output Active 0 0 0 ns 9tGHQZ i tOHZ Output Disable to Output Inactive 18 20 25 ns 10 tELICCH e tPA Chip Enable to Power Active 0 0 0 ns 11 tEHICCL c,e tPS Chip Disable to Power Standby 25 25 25 ns 11A tWHQV tWR Write Recovery Time 35 45 55 ns #1, #2 Alt. MIN MAX MIN MAX MIN MAX |
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