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AD7656ABSTZ-RL Scheda tecnica(PDF) 8 Page - Analog Devices

Il numero della parte AD7656ABSTZ-RL
Spiegazioni elettronici  250 kSPS, 6-Channel, Simultaneous Sampling, Bipolar 16-Bit ADC
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
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AD7656A
Data Sheet
Pin No.
Mnemonic
Description
10
DB7/HBEN/DCEN
Data Bit 7/High Byte Enable/Daisy-Chain Enable. When operating in parallel word mode (SER/PAR/SEL
= 0 and W/B = 0), Pin 10 takes on its Data Bit 7 function. When operating in parallel byte mode
(SER/PAR/SEL = 0 and W/B = 1), Pin 10 takes on its HBEN function. When in this mode and the HBEN
pin is logic high, the data is output MSB byte first on DB15 to DB8. When the HBEN pin is logic low,
the data is output LSB byte first on DB15 to DB8. When operating in serial mode (SER/PAR/SEL = 1),
Pin 10 takes on its DCEN function. When the DCEN pin is logic high, the AD7656A operates in daisy-
chain mode with DB5 to DB3 taking on their DCIN A to DCIN C function. When operating in serial
mode but not in daisy-chain mode, tie DCEN to DGND.
11
DB6/SCLK
Data Bit 6/Serial Clock. When SER/PAR/SEL = 0, this pin acts as a three-state parallel digital output pin.
When SER/PAR/SEL = 1, this pin takes on its SCLK input function; it is the read serial clock for the serial
transfer.
12
DB5/DCIN A
Data Bit 5/Daisy-Chain Input A. When SER/PAR/SEL is low, this pin acts as a three-state parallel
digital output pin. When SER/PAR SEL = 1 and DCEN = 1, this pin acts as Daisy-Chain Input A. When
operating in serial mode but not in daisy-chain mode, tie this pin to DGND.
13
DB4/DCIN B
Data Bit 4/Daisy-Chain Input B. When SER/PAR/SEL = 0, this pin acts as a three-state parallel digital
output pin. When SER/PAR/SEL = 1 and DCEN = 1, this pin acts as Daisy-Chain Input B. When
operating in serial mode but not in daisy-chain mode, tie this pin to DGND.
14
DB3/DCIN C
Data Bit 3/Daisy-Chain Input C. When SER/PAR/SEL = 0, this pin acts as a three-state parallel digital
output pin. When SER/PAR/SEL = 1 and DCEN = 1, this pin acts as Daisy-Chain Input C. When
operating in serial mode but not in daisy-chain mode, tie this pin to DGND.
15
DB2/SEL C
Data Bit 2/Select DOUT C. When SER/PAR/SEL = 0, this pin acts as a three-state parallel digital output
pin. When SER/PAR/SEL = 1, this pin takes on its SEL C function; it is used to configure the serial
interface. If this pin is 1, the serial interface operates with three DOUT output pins and enables
DOUT C as a serial output. If this pin is 0, the DOUT C is not enabled to operate as a serial data
output pin. Leave unused serial DOUT pins unconnected.
16
DB1/SEL B
Data Bit 1/Select DOUT B. When SER/PAR/SEL = 0, this pin acts as a three-state parallel digital output
pin. When SER/PAR/SEL = 1, this pin takes on its SEL B function; it is used to configure the serial
interface. If this pin is 1, the serial interface operates with two or three DOUT x output pins and
enables DOUT B as a serial output. If this pin is 0, the DOUT B is not enabled to operate as a serial
data output pin and only one DOUT output pin, DOUT A, is used. Leave unused serial DOUT pins
unconnected.
17
DB0/SEL A
Data Bit 0/Select DOUT A. When SER/PAR/SEL = 0, this pin acts as a three-state parallel digital output
pin. When SER/PAR/SEL = 1, Pin 17 takes on its SEL A function; it is used to configure the serial
interface. If this pin is 1, the serial interface operates with one, two, or three DOUT x output pins and
enables DOUT A as a serial output. When operating in serial mode, this pin must always be 1.
18
BUSY
Busy Output. This pin transitions high when a conversion is started and remains high until the
conversion is complete and the conversion data is latched into the output data registers. Do not
initiate a new conversion on the AD7656A when the BUSY signal is high.
19
CS
Chip Select. This active low logic input frames the data transfer. When both CS and RD are logic low
in parallel mode, the output bus is enabled and the conversion result is output on the parallel data
bus lines. When both CS and WR are logic low in parallel mode, DB15 to DB8 are used to write data
to the on-chip control register. In serial mode, the CS is used to frame the serial read transfer and
clock out the MSB of the serial output data.
20
RD
Read Data. When both CS and RD are logic low in parallel mode, the output bus is enabled. In serial
mode, hold the RD line low.
21, 22, 23
CONVST C,
CONVST B,
CONVST A
Conversion Start Input C, Conversion Start Input B, and Conversion Start Input A. These logic inputs
are used to initiate conversions on the ADC pairs. CONVST A is used to initiate simultaneous conversions
on V1 and V2, CONVST B is used to initiate simultaneous conversions on V3 and V4, and CONVST C is
used to initiate simultaneous conversions on V5 and V6. When CONVST x switches from low to high,
the track-and-hold switch on the selected ADC pair switches from track to hold, and the conversion
is initiated. These inputs can also be used to place the ADC pairs into partial power-down mode.
24
STBY
Standby Mode Input. This pin is used to put all six on-chip ADCs into standby mode. The STBY pin is
high for normal operation and low for standby operation.
26
DVCC
Digital Power, 4.75 V to 5.25 V. Ideally, the DVCC and AVCC voltages are at the same potential and must
not be more than 0.3 V apart, even on a transient basis. Decouple this supply to DGND, and place
10 µF and 100 nF decoupling capacitors on the DVCC pin.
Rev. 0 | Page 8 of 28


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