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ADV3224-EVALZ Scheda tecnica(PDF) 3 Page - Analog Devices |
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ADV3224-EVALZ Scheda tecnica(HTML) 3 Page - Analog Devices |
3 / 24 page Data Sheet ADV3224/ADV3225 Rev. B | Page 3 of 24 SPECIFICATIONS VS = ±5 V, TA = 25°C, RL = 150 Ω, unless otherwise noted. Table 1. ADV3224 ADV3225 Parameter Test Conditions/Comments Min Typ Max Min Typ Max Unit DYNAMIC PERFORMANCE −3 dB Bandwidth 200 mV p-p 1200 900 MHz 2 V p-p 750 850 MHz Gain Flatness 0.1 dB, 2 V p-p 55 50 MHz 0.5 dB, 2 V p-p 250 235 MHz Propagation Delay 2 V p-p 0.6 0.6 ns Settling Time 1%, 2 V step 3 3 ns Slew Rate 2 V step, peak 2500 2500 V/μs NOISE/DISTORTION PERFORMANCE Differential Gain Error NTSC or PAL 0.01 0.02 % Differential Phase Error NTSC or PAL 0.01 0.02 Degrees Crosstalk, All Hostile, RTO f = 100 MHz −45 −45 dB f = 5 MHz −87 −70 dB Off Isolation, Input to Output f = 100 MHz, one channel −80 −87 dB OIP2 f = 100 MHz, RL = 100 Ω 38 dBm f = 500 MHz, RL = 100 Ω 15 dBm OIP3 f = 100 MHz, RL = 100 Ω 32 dBm f = 500 MHz, RL = 100 Ω 7 dBm Output 1 dB Compression Point f = 100 MHz, RL = 100 Ω 19 dBm f = 500 MHz, RL = 100 Ω 10 dBm Input Voltage Noise Density 50 MHz 18 18 nV/√Hz DC PERFORMANCE Gain Error 0.1 0.5 0.2 1.5 % Gain Matching Channel-to-channel 0.5 1.5 % Gain Temperature Coefficient 0.5 5 ppm/°C OUTPUT CHARACTERISTICS Output Resistance DC, enabled 0.2 0.2 Ω DC, disabled 15 8 MΩ Output Disabled Capacitance 2.2 2.6 pF Output Leakage Current Output disabled 0.5 0.5 μA Output Voltage Range No load ±3 ±3 V RL = 150 Ω ±2.8 ±2.8 V Short-Circuit Current 55 55 mA INPUT CHARACTERISTICS Input Offset Voltage Worst case (all configurations) ±5 ±5 mV Input Offset Voltage Drift 5 5 μV/°C Input Voltage Range ±3 ±1.5 V Input Capacitance Any switch configuration 1.8 1.8 pF Input Resistance 2 2 MΩ Input Bias Current Any switch configuration ±1 ±1 μA SWITCHING CHARACTERISTICS Enable/Disable Time 50% UPDATE to 1% settling 20 20 ns Switching Time, 2 V Step 50% UPDATE to 1% settling 20 20 ns Switching Transient (Glitch) 25 50 mV p-p |
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