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DAC7551TDRNRQ1 Scheda tecnica(PDF) 3 Page - Texas Instruments |
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DAC7551TDRNRQ1 Scheda tecnica(HTML) 3 Page - Texas Instruments |
3 / 27 page V DD V H REF V L REF V FB V OUT GND IOV DD SDO SDIN SCLK SYNC CLR 1 2 3 4 5 6 12 11 10 9 8 7 Thermal Pad (1) DAC7551-Q1 www.ti.com SLAS767B – JUNE 2011 – REVISED MARCH 2015 5 Pin Configuration and Functions DRN Package 12-Pin USON With Exposed Thermal Pad Top View (1) The thermal pad should be connected to GND. Pin Functions PIN I/O DESCRIPTION NO. NAME 1 VDD I Analog voltage supply input 2 VREFH I Positive reference voltage input 3 VREFL I Negative reference voltage input 4 VFB I DAC amplifier sense input. 5 VOUT O Analog output voltage from DAC 6 GND — Ground. Asynchronous input to clear the DAC registers. When the CLR pin is low, the DAC register is set to 7 CLR I 000h and the output voltage to 0 V. Frame synchronization input. The falling edge of the SYNC pulse indicates the start of a serial data 8 SYNC I frame shifted out to the DAC7551-Q1 device. 9 SCLK I Serial clock input 10 SDIN I Serial data input 11 SDO O Serial data output 12 IOVDD I I/O voltage supply input 6 Specifications 6.1 Absolute Maximum Ratings Over operating free-air temperature range (unless otherwise noted). (1) MIN MAX UNIT VDD , IOVDD to GND –0.3 6 V Digital input voltage to GND –0.3 VDD + 0.3 V VOUT to GND –0.3 VDD + 0.3 V Operating temperature range –40 105 °C Junction temperature, TJ max 150 °C Power dissipation (DRN) (TJ max – TA) / RθJA Storage temperature, Tstg –65 150 °C (1) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability. Copyright © 2011–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: DAC7551-Q1 |
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