6

TPA3250

SLASE99A – DECEMBER 2015 – REVISED APRIL 2016

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7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

TYP

MAX

UNIT

PVDD_x

Half-bridge supply

DC supply voltage

12

32

38

V

GVDD_x

Supply for logic regulators and gate-drive

circuitry

DC supply voltage

10.8

12

13.2

V

VDD

Digital regulator supply voltage

DC supply voltage

10.8

12

13.2

V

Load impedance

Output filter inductance within

recommended value range

2.7

4

Ω

1.5

3

1.6

2

Output filter inductance

5

μH

5

5

PWM frame rate selectable for AM

interference avoidance; 1% Resistor

tolerance

Nominal

430

450

470

kHz

AM1

475

500

525

AM2

575

600

625

PWM frame rate programming resistor

Nominal; Master mode

29.7

30

30.3

k

Ω

AM1; Master mode

19.8

20

20.2

AM2; Master mode

9.9

10

10.1

PVDD close decoupling capacitors

1.0

μF

Over-current programming resistor

Resistor tolerance = 5%

22

30

k

Ω

Over-current programming resistor

Resistor tolerance = 5%

47

64

k

Ω

Voltage on FREQ_ADJ pin for slave

mode operation

Slave mode

3.3

V

Junction temperature

0

125

°C

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.4 Thermal Information

TPA3250

UNIT

DDV 44-PINS HTSSOP

JEDEC STANDARD 4 LAYER PCB

Junction-to-ambient thermal resistance

26.0

°C/W

Junction-to-case (top) thermal resistance

10.2

°C/W

Junction-to-board thermal resistance

6.5

°C/W

Junction-to-top characterization parameter

0.2

°C/W

Junction-to-board characterization parameter

6.5

°C/W

Junction-to-case (bottom) thermal resistance

1.4

°C/W