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TS3A227E Scheda tecnica(PDF) 8 Page - Texas Instruments |
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TS3A227E Scheda tecnica(HTML) 8 Page - Texas Instruments |
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8 / 59 page  TS3A227E SCDS358B – NOVEMBER 2014 – REVISED FEBRUARY 2015 www.ti.com Electrical Characteristics (continued) Unless otherwise noted the specification applies over the VDD and ambient operating temperature range. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS VDD = 3.3 V ± 200 mVPP, f = 217 Hz, RL at PSR217 –95 –120 RING2= 50 Ω VDD = 3.3 V ± 200 mVPP, f = 1 kHz, RL at PSR1k Power supply rejection –85 –110 dB RING2= 50 Ω VDD = 3.3 V ± 200 mVPP, f = 20 kHz, RL at PSR20k –70 –90 RING2= 50 Ω SLEEVE_SENSE or RING2_SENSE to ISOS3 VIN = 200 mVPP, f = 20 Hz – 20 kHz, RL = 50 Ω –90 dB MICP Isolation SLEEVE_SENSE to RING2_SENSE SEPS3 VIN = 200 mVPP, f = 20 Hz – 20 kHz, RL = 50 Ω –75 dB Separation BW Bandwidth through GNDFETs VIN = 60 mVPP, IBIAS = 10 mA 120 150 MHz VIN = 1.5 V + 200 mVPP, f = 20 Hz – 20 kHz, THD200 0.003 % MICP to RING2_SENSE or RS = 600 Ω, RL = 600 Ω SLEEVE_SENSE total harmonic VIN = 1.5 V + 500 mVPP, f = 20 Hz – 20 kHz, distortion THD500 0.002% RS = 600 Ω, RL = 600 Ω VIN = 1 VRMS, f = 20 Hz – 20 kHz, MICP to RING2_SENSE or SNR –90 –110 dB SLEEVE_SENSE signal to noise ratio RS = 600 Ω, RL = 600 Ω Time between DET_TRIGGER transition from tDET Detection sequence duration high to low and INT transition from high to low. 175 210 ms Default 90 ms insertion debounce. Time from VDD > 2.5 V till I 2C communication is Tpower-up Power up time Power-up time 20 25 ms ready Time between DET_TRIGGER transition from tREMOVAL Removal wait period low to high and RING2/SLEEVE DFETs turning 50 65 ms on 7.6 I 2C Interface Timing Characteristics Unless otherwise noted the specification applies over the VDD and ambient operating temperature range STANDARD MODE FAST MODE I2C UNIT I2C BUS BUS PARAMETER MIN MAX MIN MAX fscl I2C clock frequency 0 100 0 400 kHz tsch I2C clock high time 4 0.6 µs tscl I2C clock low time 4.7 1.3 µs tsp I2C spike time 50 50 ns tsds I2C serial data setup time 250 100 ns tsdh I2C serial data hold time 0 0 ns ticr I2C input rise time 1000 21 300 ns ticf I2C input fall time 300 21 300 ns 20 + 0.1 tocf I2C output fall time; 10 pF to 400 pF bus 300 300 µs Cb tbuf I2C bus free time between Stop and Start 4.7 1.3 µs tsts I2C Start or repeater Start condition setup time 4.7 0.6 µs tsth I2C Start or repeater Start condition hold time 4 0.6 µs tsps I2C Stop condition setup time 4 0.6 µs tvd(data) Valid data time; SCL low to SDA output valid 3.45 0.3 0.9 µs Valid data time of ACK condition; ACK signal from SCL low to SDA tvd(ack) 3.45 0.3 0.9 µs (out) low Cb I2C bus capacitive loading 0 400 0 400 pF 8 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: TS3A227E |
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