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FDC2112-Q1 Scheda tecnica(PDF) 3 Page - Texas Instruments |
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FDC2112-Q1 Scheda tecnica(HTML) 3 Page - Texas Instruments |
3 / 58 page 1 2 3 4 12 11 10 9 DAP SCL SDA CLKIN ADDR IN0A IN0B IN1A IN1B DAP 1 SCL 3 CLKIN 4 ADDR INTB 5 VDD 7 GND 8 IN0A 9 IN0B 10 IN1A 11 SD 6 IN1B 12 2 SDA 3 FDC2112-Q1, FDC2114-Q1, FDC2212-Q1, FDC2214-Q1 www.ti.com SNOSCZ9 – MAY 2016 Product Folder Links: FDC2112-Q1 FDC2114-Q1 FDC2212-Q1 FDC2214-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 5 Pin Configuration and Functions FDC2112/FDC2212 DNT Package 12-Pin WSON Top View FDC2114/FDC2214 RGH Package 16-Pin WQFN Top View (1) I = Input, O = Output, P=Power, G=Ground, A=Analog (2) There is an internal electrical connection between the exposed Die Attach Pad (DAP) and the GND pin of the device. Although the DAP can be left floating, for best performance the DAP should be connected to the same potential as the device's GND pin. Do not use the DAP as the primary ground for the device. The device GND pin must always be connected to ground. Pin Functions PIN TYPE(1) DESCRIPTION NO. NAME 1 SCL I I2C clock input 2 SDA I/O 12C data input/output 3 CLKIN I Master Clock input. Tie this pin to GND if internal oscillator is selected 4 ADDR I I2C Address selection pin: when ADDR=L, I2C address = 0x2A, when ADDR=H, I2C address = 0x2B. 5 INTB O Configurable Interrupt output pin 6 SD I Shutdown input 7 VDD P Power Supply 8 GND G Ground 9 IN0A A Capacitive sensor input 0 10 IN0B A Capacitive sensor input 0 11 IN1A A Capacitive sensor input 1 12 IN1B A Capacitive sensor input 1 13 IN2A A Capacitive sensor input 2 (FDC2114 / FDC2214 only) 14 IN2B A Capacitive sensor input 2 (FDC2114 / FDC2214 only) 15 IN3A A Capacitive sensor input 3 (FDC2114 / FDC2214 only) 16 IN3B A Capacitive sensor input 3 (FDC2114 / FDC2214 only) DAP DAP(2) N/A Connect to ground |
Codice articolo simile - FDC2112-Q1 |
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Descrizione simile - FDC2112-Q1 |
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