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AM3894CCYG135 Scheda tecnica(PDF) 9 Page - Texas Instruments

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Il numero della parte AM3894CCYG135
Spiegazioni elettronici  Sitara ARM Microprocessors
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Produttore elettronici  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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AM3894CCYG135 Scheda tecnica(HTML) 9 Page - Texas Instruments

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ARM Cortex™-A8
NEON
ETM
256KB L2$
32KB L1I$ 32KB L1D$
Arbiter
128
32
ICECrusher
48KB ROM
64KB RAM
ARM Cortex-A8
Interrupt Controller
(AINTC)
L3
DMM
32
128
64
64
64
64
128
128
SYSCLK2
128
System Events
DEVOSC
Trace
Debug
AM3894
AM3892
www.ti.com
SPRS681G – OCTOBER 2010 – REVISED MARCH 2015
Table 3-2. Characteristics of the Processor (continued)
HARDWARE FEATURES
AM3894 and AM3892
CPU Frequency
MHz
Up to 1350 MHz
Core Logic (V)
1.0 V with Required AVS Capability
USB Logic (V)
0.9 V
Voltage
RAM (V)
1.0 V
IO (V)
1.5 V, 1.8 V, 3.3 V
Package
25 x 25 mm
1031-Pin BGA (CYG)
Process Technology
µm
0.04 µm
Product Preview (PP),
Product Status(1)
Advance Information (AI),
PD
or Production Data (PD)
(1)
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
3.2
ARM Subsystem
The ARM subsystem is designed to give the ARM Cortex-A8 master control of the device. In general, the
ARM Cortex-A8 is responsible for configuration and control of the various subsystem, peripherals, and
external memories.
The ARM subsystem includes the following features:
ARM Cortex-A8 RISC processor:
ARMv7 ISA plus Thumb®-2, Jazelle-X, and media extensions
NEON floating-point unit
Enhanced memory management unit (MMU)
Little Endian
32KB L1 instruction cache
32KB L1 data cache
256KB L2 cache
Foresight embedded trace module (ETM)
ARM Cortex-A8 interrupt controller (AINTC)
64KB internal RAM
48KB internal public ROM.
Figure 3-1. ARM Cortex-A8 Subsystem Block Diagram
Copyright © 2010–2015, Texas Instruments Incorporated
Device Comparison
9
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