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ADC1005 Scheda tecnica(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Il numero della parte ADC1005
Spiegazioni elettronici  10-Bit P Compatible A/D Converter
Download  12 Pages
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Produttore elettronici  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
Logo NSC - National Semiconductor (TI)

ADC1005 Scheda tecnica(HTML) 4 Page - National Semiconductor (TI)

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AC Electrical Characteristics
The following specifications apply for V
CC = 5V, VREF = 5V,VREF = 5V, tr=tf= 20 ns unless otherwise specified. Boldface lim-
its apply from T
MIN to TMAX; All other limits TA = Tj = 25˚C.
Typ
Tested
Design
Limit
Parameter
Conditions
(Note 5)
Limit
Limit
Units
(Note 6)
(Note 7)
f
CLK, Clock Frequency
MIN
0.2
0.2
MHz
MAX
2.6
2.6
MHz
Clock Duty Cycle
MIN
40
40
%
MAX
60
60
%
t
C, Conversion Time
MIN
80
80
1/f
CLK
MAX
90
90
1/f
CLK
MIN
f
CLK=1.8 MHz
45
45
µs
MAX
f
CLK=1.8 MHz
50
50
µs
t
W(WR)L, Minimum WR Pulse
Width
CS =0
100
150
150
ns
t
ACC, Access Time (Delay from
falling edge of RD to Output
Data Valid)
CS =0
170
300
300
ns
C
L=100 pF, RL = 2k
t
1H,t0H, TRI-STATE Control
(Delay from Rising Edge of RD
to Hi-Z State)
R
L=10k, CL=10 pF
125
200
ns
R
L=2k, CL=100 pF
145
230
230
ns
t
WI,tRI, Delay from Falling
Edge of WR or RD to Reset of
INTR
300
450
450
ns
t
IRS, INTR to 1st Read Set-up
Time
400
550
550
ns
C
IN, Capacitance of Logic
Inputs
5
7.5
pF
C
OUT, Capacitance of Logic
Outputs
5
7.5
pF
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions.
Note 2: All voltages are measured with respect to ground.
Note 3: Linearity error is defined as the deviation of the analog value, expressed in LSBs, from the straight line which passes through the end points of the transfer
characteristic.
Note 4: For VIN(−)≥VIN(+) the digital output code will be 00 0000 0000. Two on-chip diodes are tied to each analog input which will forward conduct for analog input
voltages one diode drop below ground or one diode drop greater than VCC supply. Be careful, during testing at low VCC levels (4.5V), as high level analog inputs (5V)
can cause this input diode to conduct, especially at elevated temperatures, and cause errors for analog inputs near full-scale. The spec allows 50 mV forward bias
of either diode. This means that as long as the analog VIN does not exceed the supply voltage by more than 50 mV, the output code will be correct. To achieve an
absolute 0 VDC to5VDC input voltage range will therefore require a minimum supply voltage of 4.950 VDC over temperature variations, initial tolerance and loading.
Note 5: Typicals are at 25˚C and represent most likely parametric norm.
Note 6: Tested and guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 7: Guaranteed, but not 100% production tested. These limits are not used to calculate outgoing quality levels.
Note 8: Human body model, 100 pF discharged through a 1.5 k
Ω resistor.
www.national.com
4


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