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ADC10030CIVT Scheda tecnica(PDF) 7 Page - National Semiconductor (TI) |
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ADC10030CIVT Scheda tecnica(HTML) 7 Page - National Semiconductor (TI) |
7 / 17 page Reference, DC, and Logic Electrical Characteristics (Continued) The following specifications apply for V A = +5.0VDC,VD = +5.0VDC,VD I/O = +5.0VDC,VREF+ = +3.5VDC,VREF− = +1.75V DC,CL = 20 pF, fCLK = 27 MHz, RS = 50Ω. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25˚C (Note 7) Symbol Parameter Conditions Typical (Note 8) Limits (Note 9) Units Power Supply Characteristics P D Power Consumption PD = LOW 121 130 mW(max) PD = HIGH 3.5 PD = LOW, f CLK = 30 MHz 125 mW AC Electrical Characteristics The following specifications apply for V A = +5.0VDC,VD = +5.0VDC,VD I/O = 5.0VDC,VREF+ = +3.5VDC,VREF− = +1.75V DC,CL = 20 pF, fCLK = 27 MHz, RS = 50Ω. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25˚C (Note 7) Symbol Parameter Conditions Typical (Note 8) Limits (Note 9) Units (Limits) f CLK1 Maximum Clock Frequency 27 30 MHz f CLK2 Minimum Clock Frequency 1 MHz t CH Clock High Time 16.5 ns(min) t CL Clock Low Time 16.5 ns(min) Duty Cycle 50 45 55 %(min) %(max) Pipeliine Delay (Latency) 2.0 Clock Cycles t rc,tfc Clock Input Rise and Fall Time 4 ns(max) t r,tf Output Rise and Fall Times 10 ns t OD Fall of CLK to Data Valid 20 25 ns(max) t OH Output Data Hold Time 12 ns t DIS Rising Edge of OE to TRI-STATE From Output High, 2k Ω to Ground 25 ns From Output Low, 2 k Ω to V D I/O 18 ns t EN Falling Edge of OE to Valid Data 1k Ω to V CC 25 ns t VALID Data Valid Time 27 ns t AJ Aperture Jitter <30 ps Full Scale Step Response t r = 10 ns 1 conversion Overrange Recovery Time V IN Step from (V REF+ +100 mV) to (V REF−) 1 conversion t WU PD Low to 1⁄2 LSB Accurate Conversion (Wake-Up Time) 700 ns Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func- tional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed speci- fications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 2: All voltages are measured with respect to GND = AGND = DGND = 0V, unless otherwise specified. Note 3: When the input voltage at any pin exceeds the power supplies (VIN < GND or VIN > VA or VD), the current at that pin should be limited to 25 mA. The 50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 25 mA to two. Note 4: The absolute maximum junction temperature (TJmax) for this device is 150˚C. The maximum allowable power dissipation is dictated by TJmax, the junction-to-ambient thermal resistance ( θJA), and the ambient temperature (TA), and can be calculated using the formula PDMAX=(TJmax − TA)/θJA. In the 32-pin TQFP, θJA is 69˚C/W, so PDMAX = 1,811 mW at 25˚C and 942 mW at the maximum operating ambient temperature of 85˚C. Note that the power dissipation of this device under normal operation will typically be about 137 mW (125 mW quiescent power+2mW reference ladder power +10 mW due to 1 TTL load on each digital output). The values for maximum power dissipation listed above will be reached only when the ADC10030 is operated in a severe fault condition (e.g. when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided. Note 5: Human body model is 100 pF capacitor discharged through a 1.5 k Ω resistor. Machine model is 220 pF discharged through ZERO Ω. Note 6: See AN450, “Surface Mounting Methods and Their Effect on Product Reliability”, or the section entitled “Surface Mount” found in any post 1986 National Semiconductor Linear Data Book, for other methods of soldering surface mount devices. Note 7: The inputs are protected as shown below. Input voltage magnitudes up to 300 mV beyond the supply rails will not damage this device. However, errors in the A/D conversion can occur if the input goes above VA or below AGND by more than 300 mV. www.national.com 7 |
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