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TLP7930F Scheda tecnica(PDF) 5 Page - Toshiba Semiconductor |
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TLP7930F Scheda tecnica(HTML) 5 Page - Toshiba Semiconductor |
5 / 18 page TLP7930,TLP7930F 5 10. 10. 10. 10. Electrical Characteristics Electrical Characteristics Electrical Characteristics Electrical Characteristics 10.1. 10.1. 10.1. 10.1. DC Characteristics (Note) (Unless otherwise specified, T DC Characteristics (Note) (Unless otherwise specified, T DC Characteristics (Note) (Unless otherwise specified, T DC Characteristics (Note) (Unless otherwise specified, Taaaa = -40 to 105 = -40 to 105 = -40 to 105 = -40 to 105 ,,,, V V V VDD1 DD1 DD1 DD1 = 4.5 to 5.5 V, V = 4.5 to 5.5 V, V = 4.5 to 5.5 V, V = 4.5 to 5.5 V, VDD2 DD2 DD2 DD2 = 3 to 5.5 V, V = 3 to 5.5 V, V = 3 to 5.5 V, V = 3 to 5.5 V, VIN+ IN+ IN+ IN+ = -200 to 200 mV, V = -200 to 200 mV, V = -200 to 200 mV, V = -200 to 200 mV, VIN- IN- IN- IN- = 0 V) = 0 V) = 0 V) = 0 V) Characteristics Integral non-linearity Differential non-linearity Input offset voltage Input offset voltage drift vs ambient temperature Input offset voltage drift vs input side supply voltage Internal Reference Voltage Gain error Input common-mode rejection ratio Signal-to-noise ratio Signal-to-(noise + distortion) Ratio Effective number of bits Total harmonic distortion Input side supply current (VDD1) Output side supply current (VDD2) Low-level output voltage High-level output voltage Output short-circuit current Equivalent input resistance Symbol INL DNL VOS |dVOS/dTa| |dVOS/dVDD1| VREF GE CMRRIN SNR SNDR ENOB THD IDD1 IDD2 VOL VOH IOSC RIN Test Condition Ta = -40 to 85 Ta = 105 Ta = 25 Ta = -40 to 105 VIN+ = 400 mVp-p, 1 kHz sine wave VIN+ = 0 V VIN+ = 0 V, VDD2 = 3.3 V VIN+ = 0 V, VDD2 = 5 V IOUT = 200 µA IOUT = -200 µA, VDD2 = 3.3 V IOUT = -200 µA, VDD2 = 5 V Min -15 -25 -0.9 0.3 -1 -2 68 65 3.1 4.8 Typ. 4 4 0.5 1.4 150 320 0.1 0.1 74 80 75 12 -78 8.5 4.6 4.9 0.03 3.2 4.9 11 80 Max 15 25 0.9 3.2 10 1 2 12 7 8 0.05 Unit LSB LSB mV µV/ µV/V mV % dB dB bits dB mA mA V V mA kΩ Note: Tested with a Sinc3 filter with a decimation ratio of 256 (with the decimation filter output configured to 16 bits). Note: All typical values are at VDD1 = 5 V, VDD2 = 5 V, Ta = 25 , unless otherwise noted. 10.2. 10.2. 10.2. 10.2. AC Characteristics (Note) (Unless otherwise specified, T AC Characteristics (Note) (Unless otherwise specified, T AC Characteristics (Note) (Unless otherwise specified, T AC Characteristics (Note) (Unless otherwise specified, Taaaa = -40 to 105 = -40 to 105 = -40 to 105 = -40 to 105 ,,,, V V V VDD1 DD1 DD1 DD1 = 4.5 to 5.5 V, V = 4.5 to 5.5 V, V = 4.5 to 5.5 V, V = 4.5 to 5.5 V, VDD2 DD2 DD2 DD2 = 3 to 5.5 V) = 3 to 5.5 V) = 3 to 5.5 V) = 3 to 5.5 V) Characteristics Output clock frequency Access time after MCLK rising edge Hold time after MCLK rising edge Common-mode transient immunity Symbol fCLK ta th CMTI Test Condition CL = 15 pF VCM = 1 kV, Ta = 25 Min 8.5 10 15 Typ. 10 33 24 20 Max 11.5 45 Unit MHz ns kV/µs Note: All typical values are at Ta = 25 . CL is approximately 15 pF which includes probe and stray wiring capacitance. 11. 11. 11. 11. Isolation Characteristics (Unless otherwise specified, T Isolation Characteristics (Unless otherwise specified, T Isolation Characteristics (Unless otherwise specified, T Isolation Characteristics (Unless otherwise specified, Taaaa = 25 = 25 = 25 = 25 )))) Characteristics Total capacitance (input to output) Isolation resistance Isolation voltage Symbol CS RS BVS Note (Note 1) (Note 1) (Note 1) Test Condition VS = 0 V, f = 1 MHz VS = 500 V, R.H. ≤ 60 % AC, 60 s AC, 1 s in oil DC, 60 s in oil Min 1 × 1012 5000 Typ. 1.0 1014 10000 10000 Max Unit pF Ω Vrms Vdc Note 1: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7 and 8 are shorted together. 2016-04-14 Rev.2.0 ©2016 Toshiba Corporation |
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