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TLP7830 Scheda tecnica(PDF) 5 Page - Toshiba Semiconductor |
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TLP7830 Scheda tecnica(HTML) 5 Page - Toshiba Semiconductor |
5 / 9 page TLP7830 5 9.2. 9.2. 9.2. 9.2. AC Characteristics (Note) (Unless otherwise specified, T AC Characteristics (Note) (Unless otherwise specified, T AC Characteristics (Note) (Unless otherwise specified, T AC Characteristics (Note) (Unless otherwise specified, Taaaa = -40 to 105 = -40 to 105 = -40 to 105 = -40 to 105 , V , V , V , VDD1 DD1 DD1 DD1 = = = = 4.5 to 5.5 V, V 4.5 to 5.5 V, V 4.5 to 5.5 V, V 4.5 to 5.5 V, VDD2 DD2 DD2 DD2 = 3 to 5.5 V) = 3 to 5.5 V) = 3 to 5.5 V) = 3 to 5.5 V) Characteristics Output clock frequency Access time after MCLK rising edge Hold time after MCLK rising edge Common-mode transient immunity Symbol fCLK ta th CMTI Test Condition CL = 15 pF VCM = 1 kV, Ta = 25 Min 8.5 10 15 Typ. 10 33 24 20 Max 11.5 45 Unit MHz ns kV/µs Note: All typical values are at Ta = 25 . CL is approximately 15 pF which includes probe and stray wiring capacitance. 10. 10. 10. 10. Isolation Characteristics (Unless otherwise specified, T Isolation Characteristics (Unless otherwise specified, T Isolation Characteristics (Unless otherwise specified, T Isolation Characteristics (Unless otherwise specified, Taaaa = 25 = 25 = 25 = 25 )))) Characteristics Total capacitance (input to output) Isolation resistance Isolation voltage Symbol CS RS BVS Note (Note 1) (Note 1) (Note 1) Test Condition VS = 0 V, f = 1 MHz VS = 500 V, R.H. ≤ 60 % AC, 60 s AC, 1 s in oil DC, 60 s in oil Min 1 × 1012 5000 Typ. 1.0 1014 10000 10000 Max Unit pF Ω Vrms Vdc Note 1: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7 and 8 are shorted together. 2015-09-10 Rev.2.0 ©2015 Toshiba Corporation |
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