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AD6673BCPZ-250 Scheda tecnica(PDF) 2 Page - Analog Devices |
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AD6673BCPZ-250 Scheda tecnica(HTML) 2 Page - Analog Devices |
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2 / 45 page  AD6673 Data Sheet Rev. C | Page 2 of 45 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 3 General Description ......................................................................... 4 Specifications..................................................................................... 5 ADC DC Specifications............................................................... 5 ADC AC Specifications ............................................................... 6 Digital Specifications ................................................................... 7 Switching Specifications .............................................................. 9 Timing Specifications ................................................................ 10 Absolute Maximum Ratings.......................................................... 11 Thermal Characteristics ............................................................ 11 ESD Caution................................................................................ 11 Pin Configuration and Function Descriptions........................... 12 Typical Performance Characteristics ........................................... 14 Equivalent Circuits ......................................................................... 16 Theory of Operation ...................................................................... 18 ADC Architecture ...................................................................... 18 Analog Input Considerations.................................................... 18 Voltage Reference ....................................................................... 20 Clock Input Considerations...................................................... 20 Power Dissipation and Standby Mode..................................... 23 Noise Shaping Requantizer ........................................................... 24 22% Bandwidth Mode (>40 MHz at 184.32 MSPS) .............. 24 33% Bandwidth Mode (>60 MHz at 184.32 MSPS) .............. 25 Digital Outputs ............................................................................... 26 JESD204B Transmit Top Level Description............................ 26 JESD204B Overview .................................................................. 26 Synchronization.......................................................................... 27 ADC Overrange and Gain Control.......................................... 33 ADC Overrange (OR)................................................................ 33 Gain Switching............................................................................ 33 DC Correction ................................................................................ 35 DC Correction Bandwidth........................................................ 35 DC Correction Readback.......................................................... 35 DC Correction Freeze................................................................ 35 DC Correction (DCC) Enable Bits .......................................... 35 Serial Port Interface (SPI).............................................................. 36 Configuration Using the SPI..................................................... 36 Hardware Interface..................................................................... 36 SPI Accessible Features.............................................................. 37 Memory Map .................................................................................. 38 Reading the Memory Map Register Table............................... 38 Memory Map Register Table..................................................... 39 Memory Map Register Description ......................................... 43 Applications Information .............................................................. 44 Design Guidelines ...................................................................... 44 Outline Dimensions....................................................................... 45 Ordering Guide .......................................................................... 45 |
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