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GS1671-IBE3 Scheda tecnica(PDF) 7 Page - Semtech Corporation

Il numero della parte GS1671-IBE3
Spiegazioni elettronici  HD/SD SDI Receiver, with Integrated Adaptive Cable Equalizer complete with SMPTE Audio and Video Processing
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Produttore elettronici  SEMTECH [Semtech Corporation]
Homepage  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

GS1671-IBE3 Scheda tecnica(HTML) 7 Page - Semtech Corporation

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GS1671 HD/SD SDI Integrated Receiver
Data Sheet
53737 - 2
September 2012
7 of 130
Figure 4-43: GSPI Time Delay .................................................................................................................... 80
Figure 4-44: In-Circuit JTAG ....................................................................................................................122
Figure 4-45: System JTAG .........................................................................................................................122
Figure 4-46: Reset Pulse .............................................................................................................................123
Figure 7-1: Pb-free Solder Reflow Profile ............................................................................................129
List of Tables
Table 1-1: Pin Descriptions ............................................................................................................................ 8
Table 2-1: Absolute Maximum Ratings................................................................................................... 16
Table 2-2: Recommended Operating Conditions................................................................................ 16
Table 2-3: DC Electrical Characteristics ................................................................................................. 17
Table 2-4: AC Electrical Characteristics ................................................................................................. 19
Table 4-1: Serial Digital Output................................................................................................................. 28
Table 4-2: PLL Loop Bandwidth ................................................................................................................ 29
Table 4-3: Input Clock Requirements...................................................................................................... 30
Table 4-4: Lock Detect Conditions............................................................................................................ 31
Table 4-5: GS1671 Output Video Data Format Selections................................................................ 34
Table 4-6: GS1671 PCLK Output Rates ................................................................................................... 36
Table 4-7: Switch Line Position for Digital Systems ........................................................................... 39
Table 4-8: Output Signals Available on Programmable Multi-Function Pins............................ 40
Table 4-9: Supported CEA-861 Formats................................................................................................. 43
Table 4-10: CEA861 Timing Formats....................................................................................................... 43
Table 4-11: Supported Video Standard Codes ..................................................................................... 48
Table 4-12: Data Format Register Codes ................................................................................................ 50
Table 4-13: Error Status Register and Error Mask Register.............................................................. 53
Table 4-14: IOPROC_DISABLE Register Bits......................................................................................... 59
Table 4-15: Serial Audio Pin Descriptions ............................................................................................. 65
Table 4-16: Audio Output Formats........................................................................................................... 67
Table 4-17: Audio Data Packet Detect Register ................................................................................... 69
Table 4-18: Audio Group DID Host Interface Settings....................................................................... 70
Table 4-19: Audio Data and Control Packet DID Setting Register................................................. 70
Table 4-20: Audio Buffer Pointer Offset Settings ................................................................................ 74
Table 4-21: Audio Channel Mapping Codes ......................................................................................... 74
Table 4-22: Audio Sample Word Lengths .............................................................................................. 75
Table 4-23: Audio Channel Status Information Registers ................................................................ 76
Table 4-24: Audio Channel Status Block for Regenerate Mode Default Settings ..................... 76
Table 4-25: Audio Mute Control Bits ....................................................................................................... 77
Table 4-26: GSPI Time Delay...................................................................................................................... 80
Table 4-27: GSPI Timing Parameters (50% levels; 3.3V or 1.8V operation) ................................ 81
Table 4-28: Video Core Configuration and Status Registers............................................................ 82
Table 4-29: SD Audio Core Configuration and Status Registers..................................................... 91
Table 4-30: HD Audio Core Configuration and Status Registers.................................................. 106
Table 4-31: ANC Extraction FIFO Access Registers.......................................................................... 121
Table 7-1: Packaging Data......................................................................................................................... 128


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