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TPIC6C595 Scheda tecnica(PDF) 4 Page - Texas Instruments |
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TPIC6C595 Scheda tecnica(HTML) 4 Page - Texas Instruments |
4 / 28 page TPIC6C595 SLIS061D – JULY 1998 – REVISED SEPTEMBER 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT VCC Logic supply voltage(2) –0.3 7 V VI Logic input voltage –0.3 7 V VDS Power DMOS drain-to-source voltage(3) –0.3 33 V Continuous source-to-drain diode anode current 0 250 mA Pulsed source-to-drain diode anode current(4) 0 500 mA ID Pulsed drain current, each output, all outputs on, TC = 25°C (4) 0 250 mA ID Continuous drain current, each output, all outputs on, TC = 25°C (4) 0 100 mA IDM Peak drain current single output, TC = 25°C (4) 0 250 mA EAS Single-pulse avalanche energy (see Figure 11) 0 30 mJ IAS Avalanche current(5) 0 200 mA Continuous total dissipation See Thermal Information TJ Operating virtual junction temperature –40 150 °C TC Operating case temperature –40 125 °C Tstg Storage temperature –65 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to GND. (3) Each power DMOS source is internally connected to GND. (4) Pulse duration ≤ 100 μs and duty cycle ≤ 2%. (5) DRAIN supply voltage = 15 V, starting junction temperature (TJS) = 25°C, L = 1.5 H, IAS = 200 mA (see Figure 11). 6.2 ESD Ratings VALUE UNIT Human-body model (HBM), per AEC Q100-002(1) ±2500 V(ESD) Electrostatic discharge V Charged-device model (CDM), per AEC Q100-011 ±200 (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Logic supply voltage 4.5 5.5 V VIH High-level input voltage 0.85 VCC V VIL Low-level input voltage 0.15 VCC V Pulsed drain output current, TC = 25°C, VCC = 5 V, all outputs on (1) (2)(see Figure 7) 250 mA tsu Setup time, SER IN high before SRCKM ↑ (see Figure 9) 20 ns th Hold time, SER IN high after SRCKM ↑, (see Figure 9) 20 ns tw Pulse duration (see Figure 9) 40 ns TC Operating case temperature –40 125 °C (1) Pulse duration ≤ 100 μs and duty cycle ≤ 2%. (2) Technique should limit TJ − TC to 10°C maximum. 4 Submit Documentation Feedback Copyright © 1998–2015, Texas Instruments Incorporated Product Folder Links: TPIC6C595 |
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