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SN74HC594DWE4 Scheda tecnica(PDF) 10 Page - Texas Instruments |
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SN74HC594DWE4 Scheda tecnica(HTML) 10 Page - Texas Instruments |
10 / 26 page VOLTAGE WAVEFORMS SETUP AND HOLD AND INPUT RISE AND FALL TIMES VOLTAGE WAVEFORMS PULSE DURATIONS th tsu 50% 50% 50% 10% 10% 90% 90% VCC VCC 0 V 0 V tr tf Reference Input Data Input 50% High-Level Pulse 50% CC 0 V 50% 50% VCC 0 V tw Low-Level Pulse VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES 50% 50% 50% 10% 10% 90% 90% VCC VOH VOL 0 V tr tf Input In-Phase Output 50% tPLH tPHL 50% 50% 10% 10% 90% 90% VOH VOL tr tf tPHL tPLH Out-of-Phase Output Test Point From Output Under Test CL (see Note A) LOAD CIRCUIT V SN54HC594, SN74HC594 SCLS040G – DECEMBER 1982 – REVISED MARCH 2015 www.ti.com 7 Parameter Measurement Information A. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. C. For clock inputs, fmax is measured when the input duty cycle is 50%. D. The outputs are measured one at a time with one input transition per measurement. E. tPLH and tPHL are the same as tpd. F. tf and tr are the same as tt. Figure 4. Load Circuit and Voltage Waveforms 10 Submit Documentation Feedback Copyright © 1982–2015, Texas Instruments Incorporated SN74HC594 |
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