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LM2903WHYST Scheda tecnica(PDF) 5 Page - STMicroelectronics |
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LM2903WHYST Scheda tecnica(HTML) 5 Page - STMicroelectronics |
5 / 14 page LM2903WH Electrical characteristics DocID028311 Rev 1 5/14 3 Electrical characteristics Table 3: VCC+ = 5 V, VCC- = GND, Tamb = 25 °C (unless otherwise specified) Symbol Parameter Test conditions Min. Typ. Max. Unit Vio Input offset voltage (1) 1 7 mV - 40 °C ≤ Tamb ≤ 150 °C 15 Iio Input offset current 5 50 nA - 40 °C ≤ Tamb ≤ 150 °C 150 Iib Input bias current (2) 25 250 - 40 °C ≤ Tamb ≤ 150 °C 400 Avd Large signal voltage gain VCC = 15 V, RL = 15 kΩ, Vο = 1 tο 11 V 25 200 V/mV ICC Supply current (all comparators) VCC = 5 V, no load 0.4 1 mA VCC = 30 V, no load 1 2.5 Vid Differential input voltage (3) VCC+ V VOL Low level output voltage Vid = -1 V, Isink = 4 mA 250 400 mV - 40 °C ≤ Tamb ≤ 150 °C 700 IOH High level output current VCC = Vo = 30 V, Vid = 1 V 0.1 nA - 40 °C ≤ Tamb ≤ 150 °C 1 µA Isink Output sink current Vid = -1 V, V o = 1.5 V 6 16 mA tres Small signal response time (4) RL = 5.1 kΩ to VCC+ 1.3 µs trel Large signal response time, TTL input (5) Vref = 1.4 V, RL = 5.1 kΩ to VCC+, output signal at 50 % of final value 500 ns Vref = 1.4 V, RL = 5.1 kΩ to VCC+, output signal at 95 % of final value 1 µs Notes: (1) At output switch point, VO ≈ 1.4 V, RS = 0 Ω with VCC + from 5 V to 30 V, and over the full input common-mode range (0 V to VCC + –1.5 V). (2) The direction of the input current is from the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output, so no loading charge exists on the reference of input lines. (3) Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the comparator provides a proper output state. The low input voltage state must not be less than –0.3 V (or 0.3 V below the negative power supply, if used). (4) The response time specified is for a 100 mV input step with 5 mV overdrive. (5) Maximum values are guaranteed by design and evaluation. |
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