LC898240

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10

Main Chip Register

Register Map

ADDR[6:0]

Register Name

Default

Function

R/W

0000h

AIFSEL

00h

acceleration control interface configuration

R/W

0001h

START

00h

start/stop acceleration control

R/W

0002h

WSEL

00h

acceleration curve selection

R/W

0003h

INTP

00h

interpolation setting between steps

R/W

0004h

DSKIP

00h

skip setting at deceleration

R/W

0005h

SETST

00h

wait time for acceleration

R/W

0006h

SETED

00h

wait time for stop

R/W

0007h

STMODE

00h

constant speed period programming mode selection

R/W

0008h

STCNTL

00h

step counts for constant speed period (LSB)

R/W

0009h

STCNTH

00h

step counts for constant speed period (MSB)

R/W

0010h

DPSTG

00h

driver initial setting

R/W

0011h

DTSTG

00h

driver active setting

R/W

0012h

GCKRTO

00h

clock setting

R/W

0013h

GADSLIM

00h

speed setting for smooth stepper mode

R/W

0014h

GPSTG

00h

initial setting for smooth stepper mode

R/W

0015h

NMBUSTG

00h

NM/BU setting

R/W

0016h

BDSTG

00h

BD setting

R/W

0017h

SOSTG

00h

step out detection setting

R/W

0018h

GADMAX

00h

upper limit of VREFO level

R/W

0019h

GADSTOP

00h

VREFO level setting at motor stop

R/W

001Ah

GADSTAT

00h

FF value

R/W

001Bh

ADTDLT

00h

AD increment value target

R/W

001Ch

ADTBSE

00h

AD base value target

R/W

001Dh

ADTLIM

00h

AD minimum value target

R/W

001Eh

ADMDRTO2

00h

excitation mode ratio setting #2

R/W

001Fh

ADMDRTO3

00h

excitation mode ratio setting #3

R/W

0020h

ADMDRTO4

00h

excitation mode ratio setting #4

R/W

0021h

ADBURTO

00h

burst up threshold

R/W

0022h

ADSTO

00h

AD step out level

R/W

0023h

IPSTG

00h

analog portion

R/W

0024h

STSSEL

00h

status out setting

R/W

0025h

IFSEL

00h

interface setting

R/W

0030h

STS

-

status

R

0031h

PHSCNT

-

phase

R

0032h

SPDCEF

-

speed coefficient

R

0033h

ADDAT_LT_ADJ

-

ADC judgement point voltage

R

0034h

GADDAT

-

VREFO coefficient

R

Register Function Description

AIFSEL: acceleration control interface configuration

(R/W)

Address

Default

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0000h

00h

-

-

-

-

-

-

-

AIFSEL

AIFSEL = 0: I/O port control mode, using pins; START, WSEL3/2/1/0 and INTP1/0.

AIFSEL = 1: register control mode, using registers; START_REG, WSEL_REG and INTP_REG.

START: start/stop acceleration control (R/W)

Address

Default

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0001h

00h

-

-

-

-

-

-

-

START_REG

It is effective during the register control mode (AIFSEL = 1).

Set START_REG from 0 to 1 during motor stop: start acceleration

Set START_REG from 1 to 0 during motor running in the constant speed: start deceleration