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ACE25Q200G Scheda tecnica(PDF) 5 Page - ACE Technology Co., LTD. |
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ACE25Q200G Scheda tecnica(HTML) 5 Page - ACE Technology Co., LTD. |
5 / 46 page ACE25Q200G 2M BIT SPI NOR FLASH Memory Series VER 1.2 5 HOLD (/HOLD)/IO3 The /HOLD signal goes low to stop any serial communications with the device, but doesn’t stop the operation of write status register, programming, or erasing in progress. The operation of HOLD, need /CS keep low, and starts on falling edge of the /HOLD signal, with SCLK signal being low (if SCLK is not being low, HOLD operation will not start until SCLK being low). The HOLD condition ends on rising edge of /HOLD signal with SCLK being low (If SCLK is not being low, HOLD operation will not end until SCLK being low). The Hold condition starts on the falling edge of the Hold (/HOLD) signal, provided that this coincides with SCK being at the logic low state. If the falling edge does not coincide with the SCK signal being at the logic low state, the Hold condition starts whenever the SCK signal reaches the logic low state. Taking the /HOLD signal to the logic low state does not terminate any Write, Program or Erase operation that is currently in progress. VCC Power Supply VCC is the supply voltage. is the single voltage used for all device functions including read, program, and erase. VSS Ground VSS is the reference for the VCC supply voltage. |
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