100

1k

10k

100k

1M

10M

0

5

10

15

20

25

30

35

40

FREQUENCY (Hz)

-ADJ

-5.0

LM22678, LM22678-Q1

SNVS585L – SEPTEMBER 2008 – REVISED NOVEMBER 2014

www.ti.com

Feature Description (continued)

7.3.3 Boot-Strap Supply

The LM22678 device incorporates a floating high-side gate driver to control the power MOSFET. The supply for

this driver is the external boot-strap capacitor connected between the BOOT pin and SW. A good quality 10 nF

ceramic capacitor must be connected to these pins with short, wide PCB traces. One reason the regulator

imposes a minimum off-time is to ensure that this capacitor recharges every switching cycle. A minimum load of

about 5 mA is required to fully recharge the boot-strap capacitor in the minimum off-time. Some of this load can

be provided by the output voltage divider, if used.

7.3.4 Internal Loop Compensation

The LM22678 has internal loop compensation designed to provide a stable regulator over a wide range of

external power stage components.

The internal compensation of the -ADJ option is optimized for output voltages below 5 V. If an output voltage of 5

V or greater is needed, the -5.0 option with an external resistor divider can be used.

Ensuring stability of a design with a specific power stage (inductor and output capacitor) can be tricky. The

LM22678 stability can be verified using the WEBENCH Designer online circuit simulation tool at WEBENCH

Designer. A quick start spreadsheet can also be downloaded from the online product folder.

The complete transfer function for the regulator loop is found by combining the compensation and power stage

transfer functions. The LM22678 has internal type III loop compensation, as detailed in Figure 11. This is the

approximate "straight line" function from the FB pin to the input of the PWM modulator. The power stage transfer

function consists of a dc gain and a second order pole created by the inductor and output capacitor(s). Due to

the input voltage feed forward employed in the LM22678, the power stage dc gain is fixed at 20 dB. The second

order pole is characterized by its resonant frequency and its quality factor (Q). For a first pass design, the

product of inductance and output capacitance should conform to Equation 3.

(3)

Alternatively, this pole should be placed between 1.5 kHz and 15 kHz and is determined by Equation 4.

(4)

The Q factor depends on the parasitic resistance of the power stage components and is not typically in the

control of the designer. Of course, loop compensation is only one consideration when selecting power stage

components (see Application and Implementation for more details).

Figure 11. Compensator Gain

10

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