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TEA1753LT Scheda tecnica(PDF) 6 Page - NXP Semiconductors

Il numero della parte TEA1753LT
Spiegazioni elettronici  HV start-up DCM/QR flyback controller with integrated DCM/QR PFC controller
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Produttore elettronici  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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TEA1753LT
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 24 August 2012
6 of 32
NXP Semiconductors
TEA1753LT
HV start-up flyback controller with integrated PFC controller
7.
Functional description
7.1 General control
The TEA1753LT contains a controller for a power factor correction circuit as well as a
controller for a flyback circuit. A typical configuration is shown in Figure 3.
7.1.1 Start-up and UnderVoltage LockOut (UVLO)
Initially the capacitor on the VCC pin is charged from the high-voltage mains using the HV
pin.
When VCC is less than Vtrip, the charge current is low. This low current protects the IC if
the VCC pin is shorted to ground. To ensure a short start-up time, the charge current above
Vtrip is increased until VCC reaches Vth(UVLO). When VCC is between Vth(UVLO) and Vstartup,
the charge current returns to low to ensure a low safe restart duty cycle during fault
conditions.
The control logic activates the internal circuitry and switches off the HV charge current
when the voltage on pin VCC passes the Vstartup level. First, the LATCH pin current source
is activated and the soft-start capacitors on the PFCSENSE and FBSENSE pins are
charged. Also the clamp circuit on the PFCCOMP pin is activated.
The PFC circuit is activated when the following conditions are met:
the LATCH pin voltage exceeds the Ven(LATCH) voltage
the PFCCOMP pin voltage reaches the Ven(PFCCOMP) voltage
the soft-start capacitor on the PFCSENSE pin is charged
Fig 3.
TEA1753LT IC typical configuration



 










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