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SM59A16U1 Scheda tecnica(PDF) 3 Page - SyncMOS Technologies,Inc

Il numero della parte SM59A16U1
Spiegazioni elettronici  Instruction-set compatible with MCS-51
Download  146 Pages
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Produttore elettronici  SYNCMOS [SyncMOS Technologies,Inc]
Homepage  http://www.syncmos.com.tw
Logo SYNCMOS - SyncMOS Technologies,Inc

SM59A16U1 Scheda tecnica(HTML) 3 Page - SyncMOS Technologies,Inc

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SM59A16U1
8-Bit Micro-controller
64KB with ISP Flash
& 6K+256B RAM embedded
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M071
Ver A SM59A16U1 04/12/2013
- 3 -
11.
Interrupt ........................................................................................................................................................ 75
11.1
Interrupt Enable 0 Register( IEN0 )........................................................................................................ 76
11.2
Interrupt Enable 1 Register( IEN1 )........................................................................................................ 76
11.3
Interrupt Enable 2 Register( IEN2 )........................................................................................................ 77
11.4
Interrupt Request Register( IRCON )..................................................................................................... 77
11.5
Interrupt Request Register 2( IRCON2 ) ................................................................................................ 78
11.6
Priority Level Structure .......................................................................................................................... 78
12.
Power Management Unit ............................................................................................................................... 80
12.1
Idle Mode.............................................................................................................................................. 80
12.2
Stop Mode ............................................................................................................................................ 80
13.
Pulse Width Modulation ( PWM ) ................................................................................................................... 81
13.1
ADC Control Register 2( ADCC2 )......................................................................................................... 83
13.2
PWM Time Base Control 0( PWMTBC0 ) .............................................................................................. 84
13.3
PWM Time Base Control 1( PWMTBC1 ) .............................................................................................. 85
13.4
PWM Output Pair Mode( PWMOPMOD ) .............................................................................................. 85
13.5
Time Base Counter by PWM clock( TBCOUNTERL, TBCOUNTERH )................................................... 86
13.6
PWM Period( PERIODL, PERIODH ) .................................................................................................... 86
13.7
Special Event Compare( SEVTCMPL, SEVTCMPH )............................................................................. 86
13.8
PWM Output Enable( PWMEN )............................................................................................................ 86
13.9
PWM Special Event( PWMSEV )........................................................................................................... 87
13.10
PWM Time Base Post Scale Register( PWMTBPOSTSCALE) .......................................................... 88
13.11
PWM Interrupt Flag(PWMINTF ) ....................................................................................................... 88
13.12
Dead Time ........................................................................................................................................ 89
13.12.1
Dead Time 0 for PWM Pair 0( DEADTIME0 ) ............................................................................ 90
13.12.2
Dead Time 1 for PWM Pair 1( DEADTIME1 ) ............................................................................ 90
13.12.3
Dead Time 2 for PWM Pair 2( DEADTIME2 ) ............................................................................ 90
13.12.4
Dead Time 3 for PWM Pair 3( DEADTIME3 ) ............................................................................ 91
13.12.5
Override Disable( OVRIDEDIS ) ............................................................................................... 91
13.12.6
Override Data ( OVRIDEDATA )................................................................................................ 92
13.12.7
PWM Polarity ( PWMPOLARITY )............................................................................................. 93
13.13
Fault Configure ( FLTCONFIG ) ........................................................................................................ 94
13.14
PWM Fault Inputs ............................................................................................................................. 94
13.15
Fault Noise Filter( FLTNF )................................................................................................................ 95
13.16
PWM Pair 0 Duty( DUTY0L, DUTY0H )............................................................................................. 95
13.17
PWM Pair 1 Duty( DUTY1L, DUTY1H )............................................................................................. 95
13.18
PWM Pair 2 Duty( DUTY2L, DUTY2H )............................................................................................. 96
13.19
PWM Pair 3 Duty( DUTY3L, DUTY3H )............................................................................................. 96
14.
IIC function.................................................................................................................................................... 97
14.1
IIC Control Register( IICCTL ) ............................................................................................................... 97
14.2
IIC Status Register( IICS ) ..................................................................................................................... 98
14.3
IIC Address1 Register( IICA1 ) .............................................................................................................. 99
14.4
IIC Address2 Register( IICA2 ) ............................................................................................................ 101
14.5
IIC Read Write Register( IICRWD ) ..................................................................................................... 101
14.6
IIC Enable Bus Transaction Register( IICEBT ).................................................................................... 101
15.
SPI Function - Serial Peripheral Interface .................................................................................................... 103
15.1
SPI Control Register 1( SPIC1 ) .......................................................................................................... 104
15.2
SPI Control Register 2( SPIC2 ) ......................................................................................................... 105
15.3
SPI Status Register (SPIS )................................................................................................................. 106
15.4
SPI Transmit Data Buffer (SPITXD ) .................................................................................................... 107
15.5
SPI Receive Data Buffer (SPIRXD) ..................................................................................................... 107
16.
KBI
– Keyboard Interface............................................................................................................................. 108
16.1
Keyboard Level Selector Register( KBLS ) .......................................................................................... 109
16.2
Keyboard Interrupt Enable Register( KBE ) ..........................................................................................110
16.3
Keyboard Interrupt Flag Register( KBF )...............................................................................................110
16.4
Keyboard De-bounce Control Register( KBD )......................................................................................112
17.
LVI & LVR
– Low Voltage Interrupt and Low Voltage Reset ...........................................................................113


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