ISL33002MSOPEVAL1Z datasheet(3/18 Pages) INTERSIL

Il numero della parte	ISL33002MSOPEVAL1Z

Spiegazioni elettronici	I2C Bus Buffer with Rise Time Accelerators and Hot Swap Capability

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Produttore elettronici	INTERSIL [Intersil Corporation]

Homepage	http://www.intersil.com/cda/home

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ISL33001, ISL33002, ISL33003

3

FN7560.6

July 11, 2014

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ISL33003

(8 LD TDFN)

TOP VIEW

ISL33003

(8 LD MSOP)

TOP VIEW

Pin Descriptions

PIN NAME

NUMBER

FUNCTION

NOTES

VCC1

8VCC1 power supply, +2.3V to +5.5V. Decouple VCC1 to ground with a high frequency

0.01µF to 0.1µF capacitor.

VCC2

1VCC2 power supply, +2.3V to +5.5V. Decouple VCC2 to ground with a high frequency

0.01µF to 0.1µF capacitor. In level shifting applications, SDA_OUT and SCL_OUT logic

thresholds are referenced to VCC2 supply levels. Connect pull-up resistors on these

pins to VCC2.

ISL33002 (8 LD TDFN, 8 LD MSOP)

ISL33003 (8 LD TDFN, 8 LD MSOP)

GND

4

Device Ground Pin

EN

1

Buffer Enable Pin. Logic “0” disables the device. Logic “1” enables the device. Logic

threshold referenced to VCC1.

ISL33001 (8 LD TDFN, 8 LD SOIC, MSOP)

5

ISL33003 (8 LD TDFN, 8 LD MSOP)

READY

5

Buffer active ‘Ready’ open drain logic output. When buffer is active, READY is high

impedance. When buffer is inactive, READY is low impedance to ground. Connect to

10kΩ pull-up resistor to VCC1.

ISL33001 only

ACC

5

Rise Time Accelerator Enable Pin. Logic “0” disables the accelerator. Logic “1”

enables the accelerator. Logic threshold referenced to VCC1.

ISL33002 only

SDA_IN

6

Data I/O Pins

SDA_OUT

7

SCL_IN

3

Clock I/O Pins

SCL_OUT

2

PAD

Thermal pad should be connected to ground or floated.

Thermal Pad; TDFN only

Pin Configurations (Continued)

3

2

1

GND 4

6

7

8

5

VCC1

EN

PAD

VCC2

SCL_IN

SCL_OUT

SDA_IN

SDA_OUT

6

7

8

5

3

2

1

4

VCC2

GND

VCC1

EN

SCL_IN

SCL_OUT

SDA_IN

SDA_OUT

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