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ISL4223EIRZ Scheda tecnica(PDF) 7 Page - Intersil Corporation

Il numero della parte ISL4223EIRZ
Spiegazioni elettronici  QFN Packaged, ±15kV ESD Protected, 2.7V to 5.5V, 150nA, 250kbps, RS-232 Transmitters/Receivers
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Produttore elettronici  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL4223EIRZ Scheda tecnica(HTML) 7 Page - Intersil Corporation

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7
FN6045.6
May 13, 2010
Detailed Description
The ISL4221E, ISL4223E and ISL3232E operate from a
single +2.7V to +5.5V supply, guarantee a 250kbps minimum
data rate, require only four small external 0.1µF capacitors,
feature low power consumption, and meet all ElA RS-232C
and V.28 specifications even with VCC = 3.0V. The circuit is
divided into three sections: The charge pump, the transmitters
and the receivers.
Charge-Pump
Intersil’s new RS-232 devices utilize regulated on-chip dual
charge pumps as voltage doublers, and voltage inverters to
generate ±5.5V transmitter supplies from a VCC supply as
low as 3.0V. This allows them to maintain RS-232 compliant
output levels over the ±10% tolerance range of 3.3V
powered systems. The efficient on-chip power supplies
require only four small, external 0.1µF capacitors for the
voltage doubler and inverter functions. The charge pumps
operate discontinuously (i.e., they turn off as soon as the V+
and V- supplies are pumped up to the nominal values),
resulting in significant power savings.
Transmitters
The transmitters are proprietary, low dropout, inverting drivers
that translate TTL/CMOS inputs to EIA/TIA-232 output levels.
Coupled with the on-chip ±5.5V supplies, these transmitters
deliver true RS-232 levels over a wide range of single supply
system voltages.
All ISL4221E, ISL4223E transmitter outputs disable and
assume a high impedance state when the device enters the
power-down mode (see Table 2). These outputs may be driven
to ±12V when disabled.
The devices guarantee a 250kbps data rate for full load
conditions (3k
Ω and 1000pF), V
CC ≥ 3.0V, with one
transmitter operating at full speed. Under more typical
conditions of VCC ≥ 3.3V, RL = 3kΩ, and CL = 250pF, one
transmitter easily operates at 900kbps.
Transmitter inputs float if left unconnected, and may cause
ICC increases. Connect unused inputs to GND for the best
performance.
Receivers
All these RS-232 devices contain standard inverting receivers,
and the ISL4221E, ISL4223E receivers three-state via the EN
control line. All the receivers convert RS-232 signals to CMOS
output levels and accept inputs up to ±25V while presenting
the required 3k
Ω to 7kΩ input impedance (see Figure 1) even
if the power is off (VCC = 0V). The receivers’ Schmitt trigger
input stage uses hysteresis to increase noise immunity and
decrease errors due to slow input signal transitions.
Receivers driving a powered down UART must be disabled to
prevent current flow through, and possible damage to, the
UART’s protection diodes (see Figures 2 and 3). This can be
accomplished on the ISL4221E, ISL4223E by driving the EN
input high whenever the UART powers down. Figure 3 also
shows that the INVALID output can be used to determine
when the UART should be powered down. When the RS-232
cable is disconnected, INVALID switches low indicating that
the UART is no longer needed. Reconnecting the cable drives
INVALID back high, indicating that the UART should be
powered up.
RXOUT
GND
≤ VROUT ≤ VCC
5k
Ω
RXIN
-25V
≤ VRIN ≤ +25V
GND
VCC
FIGURE 1. INVERTING RECEIVER CONNECTIONS
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN
PERIPHERAL
OLD
VCC
POWERED
GND
SHDN = GND
VCC
Rx
Tx
VCC
CURRENT
VOUT = VCC
FLOW
RS-232 CHIP
DOWN
UART
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
ISL4221E, ISL4223E
TRANSITION
RX
TX
INVALID
ROUT
TIN
VCC
VCC
TO
RIN
TOUT
VOUT = HI-Z
POWERED
DETECTOR
DOWN
UART
WAKE-UP
LOGIC
EN = VCC
ISL3232E, ISL4221E, ISL4223E


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