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ISLA214P20IRZ Scheda tecnica(PDF) 4 Page - Intersil Corporation |
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ISLA214P20IRZ Scheda tecnica(HTML) 4 Page - Intersil Corporation |
4 / 35 page ISLA214P 4 FN7572.2 December 5, 2012 Pin Configuration - CMOS MODE ISLA214P (72 LD QFN) TOP VIEW 58 D1P LVDS Bit 1 True NC in DDR Mode 59 D0N LVDS Bit 0 (LSB) Output Complement DDR Logical Bits 0, 1 60 D0P LVDS Bit 0 (LSB) Output True DDR Logical Bits 0, 1 63, 64 ORN, ORP LVDS Over Range Complement, True DDR Over Range 66 SDO SPI Serial Data Output 67 CSB SPI Chip Select (active low) 68 SCLK SPI Clock 69 SDIO SPI Serial Data Input/Output Exposed Paddle AVSS Analog Ground Pin Descriptions - 72 Ld QFN, LVDS Mode (Continued) PIN NUMBER LVDS PIN NAME LVDS PIN FUNCTION DDR MODE COMMENTS 72 71 70 69 68 67 66 65 64 63 62 61 60 59 D3 DNC D4 DNC D5 DNC CLKOUT DNC RLVDS OVSS D6 DNC D7 DNC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 54 53 52 51 50 49 48 47 46 45 44 43 42 41 DNC DNC NAPSLP VCM AVSS AVDD AVSS VINN VINN VINP VINP AVSS AVDD AVSS 19 20 21 22 23 24 25 26 27 28 29 30 31 32 15 16 17 18 CLKDIV IPTAT DNC RESETN 33 34 35 36 D8 DNC D9 DNC 40 39 38 37 58 57 56 55 Connect Thermal Pad to AVSS Consult Mechanical Drawing for Physical Dimensions Thermal Pad Not Drawn to Scale, |
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