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SM320C6678 Scheda tecnica(PDF) 5 Page - Texas Instruments |
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SM320C6678 Scheda tecnica(HTML) 5 Page - Texas Instruments |
5 / 244 page Multicore Fixed and Floating-Point Digital Signal Processor Copyright 2014 Texas Instruments Incorporated SM320C6678 Features and Description 5 SPRS910A—April 2014 SM320C6678-HIREL Submit Documentation Feedback 1.6 Functional Block Diagram Figure 1-2 shows the functional block diagram of the SM320C6678 device. Figure 1-2 Functional Block Diagram 8 Cores @ up to 1.4 GHz Power Management Debug & Trace Boot ROM Semaphore Packet DMA Multicore Navigator Queue Manager ´3 PLL EDMA ´3 4MB MSM SRAM 64-Bit DDR3 EMIF Memory Subsystem MSMC C66x™ CorePac 32KB L1 P-Cache 32KB L1 D-Cache 512KB L2 Cache C66x™ CorePac 32KB L1 P-Cache 32KB L1 D-Cache 512KB L2 Cache C66x™ CorePac 32KB L1 P-Cache 32KB L1 D-Cache 512KB L2 Cache C66x™ CorePac 32KB L1 P-Cache 32KB L1 D-Cache 512KB L2 Cache C66x™ CorePac 32KB L1 P-Cache 32KB L1 D-Cache 512KB L2 Cache C66x™ CorePac 32KB L1 P-Cache 32KB L1 D-Cache 512KB L2 Cache C66x™ CorePac 32KB L1 P-Cache 32KB L1 D-Cache 512KB L2 Cache C66x™ CorePac 32KB L1 P-Cache 32KB L1 D-Cache 512KB L2 Cache TeraNet HyperLink TeraNet Network Coprocessor Packet Accelerator Security Accelerator SM320C6678 |
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