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L6726 Scheda tecnica(PDF) 5 Page - Unisonic Technologies |
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L6726 Scheda tecnica(HTML) 5 Page - Unisonic Technologies |
5 / 13 page L6726 LINEAR INTEGRATED CIRCUIT UNISONICTECHNOLOGIESCO.,LTD 5 of 13 www.unisonic.com.tw QW-R108-015.D FUNCTIONAL DIAGRAM 10 12 13 DC 7 9 85 11 3 2 15 16 6 14 4 17 18 AR AT AM 1 UTC L6726 1.Impedance to line and radio interference suppression. 2.Transmit gain and frequency response network. 3.Receive gain and frequency response network. 4.Side tone balance network. 5.DC-supply components. AD DTMF input DC output for external CMOS device 5 2 4 1 3 Mute (active low) Telephone Line +LINE -LINE REC MUTE VM V4 IL DTMF IDC VDC ARTIFICAIAL LINE C1 1μF 600Ω V1 V2 RLoad =400Ω+400Ω VL Fig. 1 Test setup without rectifier bridge 5H+5H RL=0~4KΩ 0 Ω when artificail line is used C1= 1μF when artificial line is used 470μF when not used V3 MIC ZMIC=350 Ω ZRec=350 Ω E=48.5V UTC 6726 with external component see fig 3 + + +LINE -LINE REC MUTE VM V4 IL DTMF IDC VDC C1 1μF 600Ω V1 V2 VL Fig. 2 Test setup with rectifier bridge 5H+5H RL=0~4KΩ E=50V Uz=(15 ~16)V MIC V3 ZMIC=350 Ω ZRec=350 Ω RLoad =400Ω+400Ω UTC 6726 with external component see fig 3 + + |
Codice articolo simile - L6726_15 |
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Descrizione simile - L6726_15 |
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