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TS5A3166-Q1 Scheda tecnica(PDF) 3 Page - Texas Instruments |
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TS5A3166-Q1 Scheda tecnica(HTML) 3 Page - Texas Instruments |
3 / 30 page SOT-23 OR SC-70 PACKAGE (TOP VIEW) 1 2 3 4 5 NO COM GND IN V+ 3 4 5 2 1 YZP PACKAGE (BOTTOM VIEW) GND COM NO IN V+ TS5A3166-Q1 www.ti.com SCDS357A – JULY 2014 – REVISED DECEMBER 2014 6 Pin Configuration and Functions Pin Functions PIN I/O DESCRIPTION NAME NO. NO 1 IO Normally closed COM 2 IO Common GND 3 GND Digital ground IN 4 Input Digital control pin to connect COM to NO V+ 5 Power Power Supply 7 Specifications 7.1 Absolute Maximum Ratings (1) (2) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT V+ Supply voltage range(3) –0.5 6.5 V VNO Analog voltage range(3)(4)(5) –0.5 V+ + 0.5 V VCOM IK Analog port diode current VNO, VCOM < 0 –50 mA On-state switch current –200 200 INO VNO, VCOM = 0 to V+ mA ICOM On-state peak switch current(6) –400 400 VI Digital input voltage range(3)(4) –0.5 6.5 V IIK Digital clamp current VI < 0 –50 mA I+ Continuous current through V+ 100 mA IGND Continuous current through GND –100 mA Tstg Storage temperature range –65 150 °C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum (3) All voltages are with respect to ground, unless otherwise specified. (4) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. (5) This value is limited to 5.5 V maximum. (6) Pulse at 1-ms duration < 10% duty cycle. 7.2 ESD Ratings VALUE UNIT Human-body model (HBM), per AEC Q100-002(1) ±2000 V(ESD) Electrostatic discharge V Charged-device model (CDM), per AEC Q100-011 ±1000 (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TS5A3166-Q1 |
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