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LS7561 Scheda tecnica(PDF) 1 Page - LSI Computer Systems |
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LS7561 Scheda tecnica(HTML) 1 Page - LSI Computer Systems |
1 / 8 page BRUSHLESS DC MOTOR CONTROLLER GENERAL DESCRIPTION The LS7560/LS7561 are CMOS integrated circuits designed to control three or four phase brushless DC motors in a closed or open loop configuration. The IC consists of a decoder which provides proper commutation sequencing, a frequency-to- pulse width converter and error amplifier for closed loop motor speed control, a PWM comparator and sawtooth oscillator for external driver power control and a 5.5V reference generator for supplying power to motor sensors. Also included is Fault detection and indication, overcurrent sensing, dynamic motor braking, forward/reverse input, sensor spacing selections and an enable input control. The overcurrent sense condition will disable all output drivers when using the LS7560 and only the bottom drivers when using the LS7561. The IC operates from 10V to 18V and provides CMOS com- patible outputs for interfacing with external power devices. Operating below 10V will activate a Fault Indication Output and disable all Output Drivers. INPUT/OUTPUT DESCRIPTION: (See Figure 2) SEQUENCE SELECT Input (Pin 1 ) A High on this input selects 60°/300° and a Low selects 120°/ 240° electrical sensor separation. Use of a 300° or 240° motor will cause opposite direction rotation as compared to a 60° or 120° motor. F/R Input (Pin 27) A High on this input selects Forward direction and a Low se- lects Reverse direction. The motor drive outputs are disabled for 2 clock cycles at the onset of a direction change. July 2002 7560-030599-1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 FIGURE 1. PIN CONNECTION DIAGRAM SEQUENCE SELECT ENABLE FAULT INDICATOR RC TACHOMETER OUT ERROR AMP (+) ERROR AMP (-) OSCILLATOR ERROR AMP OUT CURRENT SENSE (+) CURRENT SENSE (-) OUT 6 OUT 5 OUT 4 OUT 3 OUT 2 OUT 1 V SS (-V) V R TOP DRIVER POLARITY SELECT PWM CONTROL BRAKE SELECT BRAKE S1 S2 S3 F/R V DD (+V) HALL SENSORS TOP VIEW S1, S2, S3 Inputs (Pins 24, 25, 26) Hall Sensor inputs which are decoded to determine the Motor Commutation Sequence. An invalid input code disables all motor outputs. Inputs have Schmitt Trigger buffers for noise immunity. BRAKE Input (Pin 23) With the BRAKE SELECT input Low, a High on the BRAKE input forces the Top Drivers to an OFF condition and the Bottom Drivers to a PWM ON condition. If the Motor is under Closed Loop control, the Loop is automatically opened and the error amplifier output is connected to the Error Amp (-) input. By controlling the voltage at teh Error Amp (+) input, the PWM duty cycle is controlled during braking. This manner of braking prevents the Bottom Motor Drivers from drawing excessive current, a condition which can occur during normal braking, when the Bottom Drivers are turned ON un- conditionally. With the BRAKE SELECT input High, a High on the BRAKE input unconditionally causes the Top Drivers to turn OFF and the Bottom Drivers to turn ON. The BRAKE function has prior- ity over all other functions. BRAKE SELECT Input (Pin 22) A Low on this input selects PWM control of braking and a High se- lects unconditional braking. ENABLE Input (Pin 2) When the ENABLE input is above VR/2, all Output Drivers are en- abled and when it is below VR/2.2, all Output Drivers are disabled. This input has a nominal hysteresis of .05VR, where VR is the inter- nally generated Reference Voltage available on Pin 19. Because the ENABLE input is level sensitive, it can easily be used to control operation of the IC based on an Analog Fault Condition. LSI/CSI LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 (631) 271-0400 FAX (631) 271-0405 UL ® A3800 FEATURES • Open loop motor control • Tachometer output for closed loop motor control • Error Amplifier and PWM Speed Comparator with full accessibility • High noise immunity Schmitt Triggers on Sensor inputs • 5.5V Reference Supply for external sensors • Cycle-by-cycle current sensing • Static, or current limited dynamic, motor braking • Output enable delay on speed direction reversal • Enable input with fault sensing capability • Fault Indicator output • 60°/300° or 120°/240° electrical sensor spacing selection • Selectable PWM of top and bottom drivers or bottom drivers only • CMOS compatible motor outputs with drive capability • Selectable top driver polarity • Low power dissipation • +10V to +18V operation (VDD-Vss) • LS7560, LS7561 (DIP); LS7560-SD, LS7561-SD (Skinny DIP); LS7560-S, LS7561-S (SOIC); LS7560-TS, LS7561-TS (TSSOP) See Figure 1 LS7560 LS7561 |
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