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ADMC328 Scheda tecnica(PDF) 5 Page - Analog Devices |
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ADMC328 Scheda tecnica(HTML) 5 Page - Analog Devices |
5 / 32 page ADMC328 –5– REV. C Parameter Min Max Unit Serial Ports Timing Requirements: tSCK SCLK Period 100 ns tSCS DR/TFS/RFS Setup before SCLK Low 15 ns tSCH DR/TFS/RFS Hold after SCLK Low 20 ns tSCP SCLKIN Width 40 ns Switching Characteristics: tCC CLKOUT High to SCLKOUT 0.25 tCK 0.25 tCK + 20 ns tSCDE SCLK High to DT Enable 0 ns tSCDV SCLK High to DT Valid 30 ns tRH TFS/RFSOUT Hold after SCLK High 0 ns tRD TFS/RFSOUT Delay from SCLK High 30 ns tSCDH DT Hold after SCLK High 0 ns tSCDD SCLK High to DT Disable 30 ns tTDE TFS (Alt) to DT Enable 0 ns tTDV TFS (Alt) to DT Valid 25 ns tRDV RFS (Multichannel, Frame Delay Zero) to DT Valid 30 ns Specifications subject to change without notice. tCC tCC tSCS tRD tRH tSCDV tSCDE tSCDD tTDV tRDV CLKOUT SCLK DR RFSIN TFSIN RFSOUT TFSOUT DT TFS (ALTERNATE FRAME MODE) RFS (MULTICHANNEL MODE, FRAME DELAY 0 [MFD = 0]) tSCP tSCK tSCP tSCH tSCDH tTDE Figure 2. Serial Port Timing |
Codice articolo simile - ADMC328_15 |
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Descrizione simile - ADMC328_15 |
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