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ADMC300 Scheda tecnica(PDF) 7 Page - Analog Devices

Il numero della parte ADMC300
Spiegazioni elettronici  High Performance DSP-Based Motor Controller
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
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ADMC300 Scheda tecnica(HTML) 7 Page - Analog Devices

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ADMC300
–7–
REV. B
Flexible Encoder Interface Subsystem
Incremental Encoder Interface
Dedicated Three Pin Interface (EIA, EIB, EIZP)
16-Bit Quadrature Counter
Input Encoder Signals to 3.1 MHz
Optional Use of Zero Marker to Reset Counter
Single North Marker Mode—Permits Single
Reset of Counter On Only First Zero Marker
Status Bits to Read Encoder Inputs
Companion Encoder Event System for Accuracy
Enhancements at Low Speeds
Associated EIU Loop Timer Permits Regular,
Programmable Updating of All Encoder and
Event Timer Registers
EIU Timer Can Also Be Used as General Purpose
Timer If Not Linked to EIU Block
Peripheral I/O (PIO) Subsystem
12-Pin Digital I/O Port
Bit Configurable as Input or Output
Each Pin Configurable as Rising Edge, Falling Edge,
High Level or Low Level Interrupt
Four Dedicated PIO Interrupts for PIO0 to PIO3
One Combined Interrupt for PIO4 to PIO11
Each I/O Line Configurable as PWM Trip Source
Two 8-Bit Auxiliary PWM Outputs
Synthesized Analog Output
Fixed 48.8 kHz Operation
0 to 99.6% Duty Cycle
Event Timer Unit
Two Event Timer Channels with Dedicated Event
Capture Blocks
Permits Timing of Duty-Cycle, Period and Frequency
Configurable Event Definition
Dedicated Event Timer Interrupt
Event Timer Readable On-the-Fly
16-Bit Watchdog Timer
Programmable 16-Bit Interval Timer with Prescaler
Two Double Buffered Synchronous Serial Ports
Four Boot Load Protocols via SPORT1
E2PROM/SROM Booting
UART Booting (SCI Compatible) with Autobaud
Feature
Synchronous Master Booting with Autobaud Feature
Synchronous Slave Booting with Autobaud Feature
Debugger Interface via SPORT1 with Autobaud (UART
and Synchronous Supported)
ROM Utilities
Full Debugger for Program Development
Preprogrammed Math Functions
Preprogrammed Motor Control Functions—Vector
Transformations
80-Lead TQFP Package
Industrial Temperature Range –40 C to +85 C
(Continued from Page 1)
GENERAL DESCRIPTION
The ADMC300 is a single-chip DSP-based controller, suitable
for high performance control of ac induction motors, permanent
magnet synchronous motors and brushless dc motors. The
ADMC300 integrates a 25 MIPS, fixed-point DSP core with a
complete set of motor control peripherals that permits fast,
efficient development of servo motor controllers.
The DSP core of the ADMC300 is the ADSP-2171, which is
completely code compatible with the ADSP-2100 DSP family
and combines three computational units, data address genera-
tors and a program sequencer. The computational units com-
prise an ALU, a multiplier/accumulator (MAC) and a barrel
shifter. The ADSP-2171 adds new instructions for bit manipu-
lation, multiplication (X squared), biased rounding and global
interrupt masking. In addition, two flexible, double-buffered,
bidirectional, synchronous serial ports are included in the
ADMC300.
The ADMC300 provides 4K
× 24-bit program memory RAM,
2K
× 24-bit program memory ROM and 1K × 16-bit data
memory RAM. The program and data memory RAM can be
boot loaded through the serial port from either a serial SROM/
E
2PROM, asynchronous (UART) connection, or synchro-
nous connection. The program memory ROM includes a
monitor that adds software debugging features through the
serial port. In addition, a number of pre-programmed math-
ematical and motor control functions are included in the
program memory ROM.
The motor control peripherals of the ADMC300 comprise a
high performance, five channel ADC system that uses sigma-
delta conversion technology offering a typical signal-to-noise
ratio (SNR) of 76 dB, equivalent to 12 bits. In addition, a 16-bit
center-based PWM generation unit can be used to produce high
accuracy PWM signals with minimal processor overhead. The
ADMC300 also contains a flexible encoder interface unit for
position sensor feedback, two auxiliary PWM outputs, twelve
lines of digital I/O, a two-channel event capture system, a 16-bit
watchdog timer, a 16-bit interval timer and a programmable
interrupt controller that manages all peripheral interrupts.


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