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CA3227M Datasheet(Scheda tecnica) 2 Page - Intersil Corporation

Numero della parte CA3227M
Dettagli  High-Frequency NPN Transistor Array For Low-Power Applications at Frequencies Up to 1.5GHz
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Produttore  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
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2
Absolute Maximum Ratings
Thermal Information
Collector to Emitter Voltage (VCEO). . . . . . . . . . . . . . . . . . . . . . . 8V
Collector to Base Voltage (VCBO) . . . . . . . . . . . . . . . . . . . . . . . 12V
Collector to Substrate Voltage (VCIO, Note 1) . . . . . . . . . . . . . . 20V
Collector Current (IC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Thermal Resistance (Typical, Note 2)
θ
JA (
oC/W)
16 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . .
90
16 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
185
Maximum Power Dissipation (Any One Transistor) . . . . . . . . 85mW
Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The collector of each transistor of these devices is isolated from the substrate by an integral diode. The substrate (Terminal 5) must be connected
to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor action.
2.
θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
TA = 25
oC
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS FOR EACH TRANSISTOR
Collector to Base Breakdown Voltage
V(BR)CBO
IC = 10µA, IE = 0
12
20
-
V
Collector to Emitter Breakdown Voltage
V(BR)CEO
IC = 1mA, IB = 0
8
10
-
V
Collector to Substrate Breakdown Voltage V(BR)CIO
IC1 = 10µA, IB = 0, IE = 0
20
-
-
V
Emitter Cutoff Current (Note 3)
IEBO
VEB = 4.5V, IC = 0
-
-
10
µA
Collector Cutoff Current
ICEO
VCE = 5V, IB = 0
-
-
1
µA
Collector Cutoff Current
ICBO
VCB = 8V, IE = 0
-
-
100
nA
DC Forward Current Transfer Ratio
hFE
VCE = 6V
IC = 10mA
-
110
-
IC = 1mA
40
150
-
IC = 0.1mA
-
150
-
Base to Emitter Voltage
VBE
VCE = 6V
IC = 1mA
0.62
0.71
0.82
V
Collector to Emitter Saturation Voltage
VCE SAT
IC = 10mA, IB = 1mA
-
0.13
0.50
V
Base to Emitter Saturation Voltage
VBE SAT
IC = 10mA, IB = 1mA
0.74
-
0.94
V
NOTE:
3. On small-geometry, high-frequency transistors, it is very good practice never to take the Emitter Base Junction into reverse breakdown. To do
so may permanently degrade the hFE. Hence, the use of IEBO rather than V(BR)EBO. These devices are also susceptible to damage by
electrostatic discharge and transients in the circuits in which they are used. Moreover, CMOS handling procedures should be employed.
CA3227




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