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AMTP32M Scheda tecnica(PDF) 11 Page - Aplus Intergrated Circuits |
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AMTP32M Scheda tecnica(HTML) 11 Page - Aplus Intergrated Circuits |
11 / 30 page Integrated Circuits Inc. aMTPxxM Series Ver 1.1 11/30 12/16/2014 CPU Serial Mode The CPU serial mode is designed for CPU interface. The host CPU can send data to control aMTPxxM. Serial Clock and Serial Data are used to input section number. BUSY is output from the chip to the host CPU for feedback response. Maximum 256 voice section are available. Pin Defined Pin Name PB0 PB1 PB2 PB3 Description Serial Clock Serial Data N.C. N.C. Pin Name PD0 PD1 PD2 Description BUSY N.C. N.C. Example |
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