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ISL54233IRUZ-T Scheda tecnica(PDF) 9 Page - Intersil Corporation |
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ISL54233IRUZ-T Scheda tecnica(HTML) 9 Page - Intersil Corporation |
9 / 18 page ISL54233 9 FN7918.0 December 21, 2011 POWER The power supply connected at VDD (pin 11) provides power to the ISL54233 part. Its voltage should be kept in the range of 2.7V to 4.6V. In a typical application, VDD will be in the range of 2.7V to 4.3V and will be connected to the battery or LDO of the MP3 player or cellphone. A 0.01µF or 0.1µF decoupling capacitor should be connected from the VDD pin to ground to filter out any power supply noise from entering the part. The capacitor should be located as close to the VDD pin as possible. LOGIC CONTROL The state of the ISL54233 device is determined by the voltage at the C1 pin (pin 9) and the C0 pin (pin 10). Refer to the “Truth Table” on page 2. The C1 pin and C0 pin are internally pulled low through 4M Ω resistors to ground and can be tri-stated or left floating. The C1 pin and C0 pin can be driven with a voltage that is higher than the VDD supply voltage. They can be driven up to 5.25V with the VDD supply in the range of 2.7V to 4.6V. Driving the logic higher than the supply rail will cause the logic current to increase. With VDD = 2.7V and VLOGIC = 5.25V, ILOGIC current is approximately 5.5µA. Logic Control Voltage Levels With VDD in the range of 2.7V to 3.6V the logic levels are: C1, C0 = Logic “0” (Low) when ≤ 0.5V or Floating. C1, C0 = Logic “1” (High) when ≥ 1.4V. ALL SWITCHES OFF Mode If the C1 pin = Logic “0” and C0 pin = Logic “0” the part will be in the ALL SWITCHES OFF mode. In this mode, the 3D- and 3D+ data switches, the 2D- and 2D+ data switches, and the 1D- and 1D+ data switches will be OFF (high impedance). The COM pins can accommodate signals that swing below ground by as much as -2V. This allows an audio CODEC to be connected to the COM pins when the device is in the all off state. USB/DV 1 Mode If the C1 pin = Logic “0” and C0 pin = Logic “1” the part will go into USB/DV1 mode. The 1D- and 1D+ switches are ON and the 2D- and 2D+ switches and 3D- and 3D+ will be OFF (high impedance). USB/DV 2 Mode If the C1 = Logic “1” and C0 pin = Logic “0” the part will be in the USB/DV2 mode. The 2D- and 2D+ switches will be ON and the 1D- and 1D+ switches and the 3D- and 3D+ will be OFF (high impedance). USB/DV 3 Mode If the C1 pin = Logic “1” and C0 pin = Logic “1” the part will be in the USB/DV3 mode. The 3D- and 3D+ switches are ON, and the 1D- and 1D+ switches and 2D- and 2D+ switches will be OFF (high impedance). Printed Circuit Board Design for High Frequency Performance In 50Ω systems, the ISL54233 has a -3dB bandwidth of 1.6GHz (see Figure 19). To achieve this high bandwidth requires careful design and layout of the PCB board. Signal traces must be designed to minimize reflections and reduce parasitic resistance, inductance and capacitance that degrade the frequency response performance. Figure 9 shows a picture of the engineering board used to measure the frequency response of the ISL54233 part. The board was specifically design for taking high frequency bandwidth measurements. The board was made with special materials and was carefully layed out using RF board techniques to maximize it for high frequency operation. The next section, “Board Layout Guidelines”, will provide a list of the PCB board requirements needed to get the maximum bandwidth from the ISL54233 part when tested with a 50 Ω Network Analyzer. FIGURE 9. RF HIGH FREQUENCY BOARD |
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