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L64250JC15 Scheda tecnica(PDF) 4 Page - InnovASIC, Inc

Il numero della parte L64250JC15
Spiegazioni elettronici  Histogram/Hough Transform Processor
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Produttore elettronici  INNOVASIC [InnovASIC, Inc]
Homepage  http://www.innovasic.com
Logo INNOVASIC - InnovASIC, Inc

L64250JC15 Scheda tecnica(HTML) 4 Page - InnovASIC, Inc

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IA64250
Data Sheet
Histogram/Hough Transform Processor
As of Production Ver. 01
Copyright
© 2000
ENG211001219-01
www.innovasic.com
innovASIC
Customer Support:
The End of Obsolescence
Page 4 of 21
1-888-824-4184
Description
The IA64250 performs three separate tasks, histogram generation, modified Hough transforms, and
pixel location. There are three modes of operation for the IA64250: computation, I/O, and
initialization.
The controller block in the block diagram decodes the instructions and contains the mode registers.
After decoding the mode, the controller generates all of the control signals to the rest of the part.
These control signals include the addresses and input data for the LUT and ACC RAMs, the select
lines for both the output mux and the shifter, and the reset for the FP counter. This block also
controls the clearing of the ACC RAM.
The ACC RAM stores the video data that is to be output during the I/O mode. This data can be
modified, depending on mode, by several methods prior to being output. These methods are
described in the computation mode section.
The LUT RAM can store up to four different data modifying functions. These functions are used to
modify the video data coming in and access the appropriate data in the ACC RAM through the ACC
RAM address. This data is then sent out on the DO output.
During the initialization mode, the functions to be performed are defined. This is accomplished by
setting the values in the mode registers contained in the controller block.
During the computation mode, the histogram, Hough transform, or pixel location data is computed.
Data equalization also occurs during this mode if desired. The controller block controls the adders
and shifters during this mode to ensure correct data manipulation. This is accomplished through the
data stored in the mode registers as well as the DV input. The controller block also generates the
addresses to both the RAMs.
The I/O mode allows data to be transferred to the Accumulation RAM (ACC RAM) and/or to and
from the Look Up Table RAM (LUT RAM). The user can also update the marker memory during
the I/O mode. The marker memory is used to quickly find points of interest on the histogram,
Hough transform, or accumulated histogram curves. Up to seven points of interest can be specified
on the grey level axis or parameter axis. The corresponding value on the accumulation axis will then
be available. The reverse is also true, where the user can specify accumulation values of interest and
obtain the corresponding grey values. The memory map located in the I/O mode description shows
the configuration of the data stored in the memory. The transfer of data from an external source to
either of the RAMs is done through either the CI or DI input bus. The controller block takes in the
data and passes it along to the appropriate RAM. The controller block also supplies the RAM with
the address and control signals needed to write the data. During a data transfer from one RAM to
the other, the controller block performs a similar task, overseeing the transfer and supplying the
necessary control signals and address.


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