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AD1855 Scheda tecnica(PDF) 9 Page - Analog Devices

Il numero della parte AD1855
Spiegazioni elettronici  Stereo, 96 kHz, Multibit DAC
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

AD1855 Scheda tecnica(HTML) 9 Page - Analog Devices

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AD1855
–9–
REV. B
CLATCH
CCLK
20
40
60
80
100
120
140
160
180
CDATA
>130ns
TIME – ns
Figure 7. SPI Port Continuous CCLK Mode
CLATCH
CCLK
CDATA
TIME – ns
200
400
600
800
1000
1200
1400
1600
1800
Figure 8. SPI Port Burst Mode
SPI Port Modes
The SPI port can be used in either of two modes, Burst Mode,
or Continuous CCLK Mode, as described below:
Continuous CCLK Mode
In this mode, the maximum CCLK frequency is 3 MHz. The
CCLK can run continuously between transactions. Please note
that the Low-to-Hi transition of the CLATCH with respect to
the rising edge of CCLK must be at least 130 ns, as shown in
Figure 7.
Burst Mode
To operate with SPI CCLK frequencies up to 12.288 MHz, the
SPI port can be operated in Burst Mode. This means that when
CLATCH is high, CCLK cannot be HI, as shown in Figure 8.


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