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ILC7081AIM5-33 Scheda tecnica(PDF) 9 Page - Impala Linear Corporation |
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ILC7081AIM5-33 Scheda tecnica(HTML) 9 Page - Impala Linear Corporation |
9 / 16 page 50/100mA SOT-23 CMOS RF LDO™ Regulators Impala Linear Corporation 9 (408) 574-3939 www.impalalinear.com Sept. 1998 ILC7080/81 1.1 4 5 1 23 Connect CIN between VIN of the ILC7080/81 and the “GROUND PLANE”. Keep the ground side of COUT and CNOISE connected to the “LOCAL GROUND” and not directly to the “GROUND PLANE”. On multilayer boards use component side copper for grounding around the ILC7080/81 and connect back to a “GROUND PLANE” using vias. If using a DC-DC converter in your design, use a star grounding system with separate traces for the power ground and the control signals. The star should radiate from where the power supply enters the PCB. Place all RF LDO related components; ILC7080/81, input capacitor CIN, noise bypass capacitor CNOISE and output capacitor COUT as close together as possible. Keep the output capacitor COUT as close to the ILC7080/81 as possible with very short traces to the VOUT and GND pins. The traces for the related components; ILC7080/81, input capacitor CIN, noise bypass capacitor CNOISE and output capacitor COUT can be run with minimum trace widths close to the LDO. Maintain a separate “LOCAL GROUND” remote from the “GROUND PLANE” to ensure a quiet ground near the LDO. Figure 9 shows how this circuit can be translated into a PCB layout. Figure 8: Recommended application circuit schematic Label Part Number Manufacturer Description U1 ILC7081AIM5-30 Impala Linear 100mA RF LDO™ J1 69190-405 Berg Connector, four position header CIN GRM40 Y5V 105Z16 muRata Ceramic capacitor, 1µF, 16V, SMT (size 0805) CNOISE ECU-V1H103KBV Panasonic Ceramic Capacitor, 0.01µF, 16V, SMT (size 0603) COUT GRM42- 6X5R475K10 muRata Ceramic Capacitor, 4.7µF, 16V, SMT (size 1206) Evaluation Board Parts List For Printed Circuit Board Shown Above 1. 2. 3. 4. 1. 2. 3. 4. Grounding Recommendations Layout Considerations Figure 9: Recommended application circuit layout (not drawn to scale). Note: ground plane is bottom layer of PCB and connects to top layer ground connections through vias |
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