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SI1012R Scheda tecnica(PDF) 2 Page - Vishay Siliconix |
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SI1012R Scheda tecnica(HTML) 2 Page - Vishay Siliconix |
2 / 11 page Vishay Siliconix Si1012R, Si1012X www.vishay.com 2 Document Number: 71166 S13-0786-Rev. E, 15-Apr-13 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 For technical questions, contact: pmostechsupport@vishay.com Notes: a. Pulse test; pulse width 300 µs, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. SPECIFICATIONS (TA = 25 °C, unless otherwise noted) Parameter Symbol Test Conditions Min. Typ. Max. Unit Static Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250 µA 0.45 0.9 V Gate-Body Leakage IGSS VDS = 0 V, VGS = ± 4.5 V ± 0.5 ± 1 µA Zero Gate Voltage Drain Current IDSS VDS = 20 V, VGS = 0 V 0.3 100 nA VDS = 20 V, VGS = 0 V, TJ = 85 °C 5µA On-State Drain Currenta ID(on) VDS = 5 V, VGS = 4.5 V 700 mA Drain-Source On-State Resistancea RDS(on) VGS = 4.5 V, ID = 600 mA 0.41 0.70 VGS = 2.5 V, ID = 500 mA 0.53 0.85 VGS = 1.8 V, ID = 350 mA 0.70 1.25 Forward Transconductancea gfs VDS = 10 V, ID = 400 mA 1 S Diode Forward Voltagea VSD IS = 150 mA, VGS = 0 V 0.8 1.2 V Dynamicb Total Gate Charge Qg VDS = 10 V, VGS = 4.5 V, ID = 250 mA 750 pC Gate-Source Charge Qgs 75 Gate-Drain Charge Qgd 225 Turn-On Delay Time td(on) VDD = 10 V, RL = 47 ID 200 mA, VGEN = 4.5 V, Rg = 10 5 ns Rise Time tr 5 Turn-Off Delay Time td(off) 25 Fall Time tf 11 |
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