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FAN5640S7X Scheda tecnica(PDF) 2 Page - Fairchild Semiconductor |
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FAN5640S7X Scheda tecnica(HTML) 2 Page - Fairchild Semiconductor |
2 / 11 page © 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN5640 • Rev. 1.0.2 2 Block Diagram Reference + Control IOUT1 VIN GND RSET EN IOUT2 1:275 Current Mirror Ratio + - OTP + CLIM 500k Figure 2. Block Diagram Pin Configuration Figure 3. Pin Assignments Pin Definitions Pin # Name Description 1 IOUT1 Output Current 1 . The programmed current IOUT is sourced from this pin. If only one channel is used, IOUT1 and IOUT2 can be tied together to boost the output current. It can also be left floating or tied to pin 5. 2 GND Ground 3 RSET RSET . Connect a programming resistor REXT to this pin. This pin’s output voltage is 0.475V when EN is HIGH. The current through the external resistor establishes the current IOUT, where IOUT = 275 • [0.475V / REXT]. 4 EN Enable . When HIGH, the IC applies the programmed current IOUT to both IOUT1 and IOUT2. When LOW, IC enters Shutdown Mode. If pulsed, this pin modulates the output current. The minimum pulse width is determined by the speed of the turn-on circuitry. This pin contains an internal pull-down resistor of 500K . 5 VIN Input Supply . Apply 6 to 20V at this pin (see Dropout Limitations under the Application Information section) . 6 IOUT2 Output Current 2 . The programmed current IOUT is sourced from this pin. If only one channel is used, IOUT1 and IOUT2 can be tied together to boost the output current. It can also be left floating or tied to pin 5. |
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