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ADDI7006BSUZ Scheda tecnica(PDF) 1 Page - Analog Devices |
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ADDI7006BSUZ Scheda tecnica(HTML) 1 Page - Analog Devices |
1 / 2 page 6-Channel, 10-Bit, 40 MSPS CCD Signal Processor Data Sheet ADDI7006 Rev. SpA Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2012–2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Six 10-bit, 40 MHz analog front-end (AFE) channels 1.8 V analog and digital core supply voltage Serial data link with reduced range low voltage differential signaling (LVDS) outputs Input amplifier with −3 dB, 0 dB, +3 dB, or +6 dB gain 6 dB to 42 dB, 10-bit variable gain amplifier (VGA) Black level clamp with variable level control Low power consumption APPLICATIONS Digital copiers Multifunction copiers Industrial high speed scanners GENERAL DESCRIPTION The ADDI7006 is a highly integrated 6-channel charged-coupled device (CCD) signal processor for high speed scanner applications. Each channel is specified at pixel rates of up to 40 MHz, and consists of six complete analog front ends with correlated double sampling, variable gain amplification, and 10- bit analog-to-digital conversion. The ADDI7006 also contains a reduced range LVDS interface for the digital data output to reduce electromagnetic interference (EMI) concerns. Each analog front end includes black level clamping, a VGA, and a 40 MSPS, 10-bit analog-to-digital converter (ADC). Operation is programmed using a 3-wire serial interface. Packaged in a space-saving 80-lead TQFP package, the ADDI7006 is specified over an operating temperature range of −25°C to +85°C. FUNCTIONAL BLOCK DIAGRAM Figure 1. For more information on the ADDI7006, email Analog Devices, Inc., at afe.ccd@analog. ROP ROM GEP GEM GOP SHP SHD CLPOB DCR GOM AFE2 AFE3 AFE4 BEP BEM AFE5 BOP BOM AFE6 REP REM –3dB, 0dB, +3dB, +6dB SHA VGA 6dB ~ 42dB CLAMP ADC AFE1 REDUCED RANGE LVDS INTERFACE GPI1 TO GPI5 SDATA SCK SCK CLI RST SL Precision Timing CORE INTERNAL CLOCKS INTERNAL REGISTERS ADDI7006 NOTES 1. THE CIRCUITRY FOR AFE1 TO AFE6 IS IDENTICAL. 5 DOUT1P_A DOUT1N_A DOUT1P_B DOUT1N_B TCLK1P TCLK1N DOUT1P_C DOUT1N_C DOUT2P_A DOUT2N_A TCLK2P TCLK2N DOUT2P_B DOUT2N_B DOUT2P_C DOUT2N_C |
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