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2SK3354-Z Scheda tecnica(PDF) 2 Page - NEC |
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2SK3354-Z Scheda tecnica(HTML) 2 Page - NEC |
2 / 4 page Data Sheet D14131EJ1V0DS00 2 2SK3354 ELECTRICAL CHARACTERISTICS (TA = 25 °C) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Drain to Source On-state Resistance RDS(on)1 VGS = 10 V, ID = 42 A6.3 8.0 m Ω RDS(on)2 VGS = 4 V, ID = 42 A8.0 12 m Ω Gate to Source Cut-off Voltage VGS(off) VDS = 10 V, ID = 1 mA 1.5 2.0 2.5 V Forward Transfer Admittance | yfs |VDS = 10 V, ID = 42 A35 59 S Drain Leakage Current IDSS VDS = 60 V, VGS = 0 V10 µA Gate to Source Leakage Current IGSS VGS = ±20 V, VDS = 0V ±10 µA Input Capacitance Ciss VDS = 10 V, VGS = 0 V, f = 1 MHz 6300 pF Output Capacitance Coss 1000 pF Reverse Transfer Capacitance Crss 490 pF Turn-on Delay Time td(on) ID = 42 A, VGS(on) = 10 V, VDD = 30 V, 100 ns Rise Time tr RG = 10 Ω 1500 ns Turn-off Delay Time td(off) 300 ns Fall Time tf 440 ns Total Gate Charge QG ID = 83 A , VDD = 48 V, VGS = 10 V 106 nC Gate to Source Charge QGS 20 nC Gate to Drain Charge QGD 30 nC Body Diode Forward Voltage VF(S-D) IF = 83 A, VGS = 0 V1.0 V Reverse Recovery Time trr IF = 83 A, VGS = 0 V, 55 ns Reverse Recovery Charge Qrr di/dt = 100 A/ µs 100 nC 5 TEST CIRCUIT 3 GATE CHARGE VGS = 20 → 0 V PG. RG = 25 Ω 50 Ω D.U.T. L VDD TEST CIRCUIT 1 AVALANCHE CAPABILITY PG. RG = 10 Ω D.U.T. RL VDD TEST CIRCUIT 2 SWITCHING TIME RG PG. IG = 2 mA 50 Ω D.U.T. RL VDD ID VDD IAS VDS BVDSS Starting Tch VGS 0 τ = 1 µs Duty Cycle ≤ 1 % τ VGS Wave Form ID Wave Form VGS ID 10 % 0 0 90 % 90 % 90 % VGS(on) ID ton toff td(on) tr td(off) tf 10 %10 % |
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