LM26400Y

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SNVS457B – FEBRUARY 2007 – REVISED AUGUST 2007

Pin Descriptions (continued)

Pin

Name

Description

Input voltage of the power supply. Directly connected to the drain of the internal NMOS switch.

11, 12, 13,14

PVIN

Tie these pins together and connect to a local bypass capacitor.

15

SW1

Switch node of Channel 1. Connects to the inductor, catch diode, and bootstrap capacitor.

Supply rail for the gate drive of Channel 1's NMOS switch. A bootstrap capacitor should be

16

BST1

placed between the BST1 and SW1 pins.

Must be connected to system ground for low thermal impedance and low grounding

DAP

Die Attach Pad

inductance.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1)

AVIN, PVIN

−0.5V to 22V

SWx Voltage

−0.5V to 22V

BSTx Voltage

−0.5V to 26V

BSTx to SW Voltage

−0.5V to 6V

FBx Voltage

−0.5V to 3V

−0.5V to 22V

SSx Voltage

−0.5V to 3V

Junction Temperature

+150°C

ESD Susceptibility

2kV

Storage Temperature Range

-65°C to 150°C

(1)

Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under which

the device is intended to be functional, but specific performance is not guaranteed. For guaranteed performance limits and associated

test conditions, see Electrical Characteristics table.

(2)

(3)

The human body model is a 100pF capacitor discharged through a 1.5 k

Ω resistor into each pin. Test method is per JESD-22-A114.

Operating Ratings

(1)

3V to 20V

Junction Temperature

−40°C to +125°C

(1)

Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under which

the device is intended to be functional, but specific performance is not guaranteed. For guaranteed performance limits and associated

test conditions, see Electrical Characteristics table.

Copyright © 2007, Texas Instruments Incorporated

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