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LM138 Scheda tecnica(PDF) 2 Page - Texas Instruments

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Il numero della parte LM138
Spiegazioni elettronici  LM138/LM338 5-Amp Adjustable Regulators
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
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LM138, LM338
SNVS771B – MAY 1998 – REVISED APRIL 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1) (2) (3)
Power Dissipation
Internally limited
Input/Output Voltage Differential
+40V,
−0.3V
Storage Temperature
−65°C to +150°C
Lead Temperature
TO-3 Package (Soldering, 10 seconds)
300°C
TO-220 Package (Soldering, 4 seconds)
260°C
ESD Tolerance
TBD
(1)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics.
(2)
Refer to RETS138K drawing for military specifications of LM138K.
(3)
If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
Operating Temperature Range
LM138
−55°C ≤ TJ ≤ +150°C
LM338
0°C
≤ TJ ≤ +125°C
Electrical Characteristics
Specifications with standard type face are for TJ = 25°C, and those with boldface type apply over full Operating
Temperature Range. Unless otherwise specified, VIN − VOUT = 5V; and IOUT = 10 mA.
(1)
LM138
Symbol
Parameter
Conditions
Units
Min
Typ
Max
VREF
Reference Voltage
3V
≤ (VIN − VOUT) ≤ 35V,
1.19
1.24
1.29
V
10 mA
≤ IOUT ≤ 5A, P ≤ 50W
VRLINE
Line Regulation
3V
≤ (VIN − VOUT) ≤ 35V
(2)
0.005
0.01
%/V
0.02
0.04
%/V
VRLOAD
Load Regulation
10 mA
≤ IOUT ≤ 5A
(2)
0.1
0.3
%
0.3
0.6
%
Thermal Regulation
20 ms Pulse
0.002
0.01
%/W
IADJ
Adjustment Pin Current
45
100
μA
ΔIADJ
Adjustment Pin Current Change
10 mA
≤ IOUT ≤ 5A,
0.2
5
μA
3V
≤ (VIN − VOUT) ≤ 35V
ΔVR/T
Temperature Stability
TMIN ≤ TJ ≤ TMAX
1
%
ILOAD(Min)
Minimum Load Current
VIN − VOUT = 35V
3.5
5
mA
ICL
Current Limit
VIN − VOUT ≤ 10V
DC
5
8
A
0.5 ms Peak
7
12
A
VIN − VOUT = 30V
1
1
A
VN
RMS Output Noise, % of VOUT
10 Hz
≤ f ≤ 10 kHz
0.003
%
ΔVR/ΔVIN
Ripple Rejection Ratio
VOUT = 10V, f = 120 Hz, CADJ = 0 μF
60
dB
VOUT = 10V, f = 120 Hz, CADJ = 10 μF
60
75
dB
Long-Term Stability
TJ = 125°C, 1000 Hrs
0.3
1
%
θJC
Thermal Resistance,
NDS Package
1
°C/W
Junction to Case
(1)
These specifications are applicable for power dissipations up to 50W for the TO-3 (NDS) package and 25W for the TO-220 (NDE)
package. Power dissipation is specified at these values up to 15V input-output differential. Above 15V differential, power dissipation will
be limited by internal protection circuitry. All limits (i.e., the numbers in the Min. and Max. columns) are specified to TI's AOQL (Average
Outgoing Quality Level).
(2)
Regulation is measured at a constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to
heating effects are covered under the specifications for thermal regulation.
2
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Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: LM138 LM338


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