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CS8151YDPSR7 Scheda tecnica(PDF) 3 Page - Cherry Semiconductor Corporation |
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CS8151YDPSR7 Scheda tecnica(HTML) 3 Page - Cherry Semiconductor Corporation |
3 / 8 page 3 Package Lead Description Package Lead # Lead Symbol Function Electrical Characteristics: continued PARAMETER TEST CONDITIONS MIN TYP MAX UNIT s WATCHDOG Input Threshold HIGH 1.4 2.0 V LOW 0.8 1.3 V Hysteresis 25 100 mV Input Current 0 < WDI < 6V -10 0 +10 µA Pulse Width 50% WDI falling edge to 5 µs 50% WDI rising edge and 50% WDI rising edge to 50% WDI falling edge (see Figure 1) s WAKE UP Output WAKE UP Period see Figure 1a 30 40 50 ms WAKE UP Duty Cycle nominal see Figure 1c 40 50 60 % HIGH to WAKE UP 50% rising edge to 15 20 25 ms Rising Delay Time 50% WAKE UP edge (see Figure 1) WAKE UP Response 50% WDI falling edge to 2 10 µs to Watchdog Input 50% WAKE UP falling edge WAKE UP Response 50% falling edge to 2 10 µs to 50% WAKE UP falling edge VOUT = 5V®4.5V Output LOW IOUT = 25µA(sinking) 0.2 0.8 V HIGH IOUT = 25µA(sourcing) 3.8 4.2 5.1 V Current Limit WAKE UP = 5V 0.025 1.00 7.00 mA WAKE UP = 0V .05 3.50 mA RESET RESET RESET RESET 7L TO-220 & 16 L PDIP 16L SOIC 7L D2PAK (internally fused) (internally fused) 299 VIN Supply voltage to the IC. 3 11 11 WDI CMOS/TTL compatible input lead. The watchdog function monitors the falling edge of the incoming signal. 4 4,5,12,13 4,5,6,12,13 Gnd Ground Connection 7 16 16 Delay Input lead from timing capacitor for and WAKE UP signal. 6 15 15 CMOS/TTL compatible output lead goes low when- ever VOUT drops by more than 6% from nominal, or during the absence of a correct watchdog signal. 5 14 14 WAKE UP CMOS/TTL compatible output consisting of a continuously generated signal used to WAKE UP the microprocessor from sleep mode. 188 VOUT Regulated output voltage 5V ± 2%. 7 7 Sense Kelvin connection which allows remote sensing of the output voltage for improved regulation. If remote sensing is not required, connect to VOUT. RESET RESET RESET |
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