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UC3842BL-S08-R Scheda tecnica(PDF) 7 Page - Unisonic Technologies |
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UC3842BL-S08-R Scheda tecnica(HTML) 7 Page - Unisonic Technologies |
7 / 10 page UC3842B/3843B LINEAR INTEGRATED CIRCUIT UNISONICTECHNOLOGIESCO.,LTD 7 of 10 www.unisonic.com.tw QW-R103-012.E APPLICATION INFORMATION(Cont.) Shutdown Techniques 8 3 (Deadtime vs CT RT > 5kΩ) SHUTDOWN 330Ω 500Ω TO CURRENT SENSE-RESISTOR 1KΩ VREF ISENSE SHUTDOWN 1 COMP The UTC UC3842B’s shutdown can be accomplished by two ways: raise Pin 3 above 1V; or pull Pin 1 below a voltage two diode drops above ground. Either method can cause the PWM comparator’s output to be high. Because the PWM latch is reset dominant, the output will remain low until the next clock cycle after the shutdown condition at Pins 1 and/or 3 is removed. Slope Compensation |
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