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AD7091R-2BRUZ Scheda tecnica(PDF) 4 Page - List of Unclassifed Manufacturers |
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AD7091R-2BRUZ Scheda tecnica(HTML) 4 Page - List of Unclassifed Manufacturers |
4 / 41 page Data Sheet AD7091R-2/AD7091R-4/AD7091R-8 SPECIFICATIONS VDD = 2.7 V to 5.25 V, VDRIVE = 1.8 V to 5.25 V, VREF = 2.5 V internal reference, fSAMPLE = 1 MSPS, fSCLK = 50 MHz, TA = TMIN to TMAX, unless otherwise noted. Table 1. Parameter Test Conditions/Comments Min Typ Max Unit DYNAMIC PERFORMANCE fIN = 10 kHz sine wave Signal-to-Noise Ratio (SNR) 66.5 70 dB Signal-to-Noise + Distortion (SINAD) 65.5 69 dB Total Harmonic Distortion (THD) −80 dB Spurious-Free Dynamic Range (SFDR) fIN = 1 kHz sine wave −81 dB Channel-to-Channel Isolation −95 dB Aperture Delay 5 ns Aperture Jitter 40 ps Full Power Bandwidth At −3 dB 1.5 MHz At −0.1 dB 1.2 MHz DC ACCURACY Resolution 12 Bits Integral Nonlinearity (INL) VDD ≥ 3.0 V −1 ±0.7 +1 LSB VDD ≥ 2.7 V −1.25 ±0.8 +1.25 LSB Differential Nonlinearity (DNL) Guaranteed no missing codes to 12 bits −0.9 ±0.3 +0.9 LSB Offset Error TA = 25°C −1.5 0.2 +1.5 mV Offset Error Matching TA = 25°C −1.5 0.2 +1.5 mV Offset Error Drift 2 ppm/°C Gain Error TA = 25°C −0.1 0.0 +0.1 % FS Gain Error Matching TA = 25°C −0.1 0.0 +0.1 % FS Gain Error Drift 2 ppm/°C ANALOG INPUT Input Voltage Range 0 VREF V DC Leakage Current −1 +1 µA Input Capacitance1 During acquisition phase 10 pF Outside acquisition phase 1.5 pF VOLTAGE REFERENCE INPUT/OUTPUT REFOUT2 Internal reference output, TA = 25°C 2.49 2.5 2.51 V REFIN2 External reference input 1.0 VDD V Drift 5 ppm/°C Power-On Time CREF = 2.2 µF 50 ms LOGIC INPUTS Input High Voltage (VIH) 0.7 × VDRIVE V Input Low Voltage (VIL) 0.3 × VDRIVE V Input Current (IIN) Typically 10 nA, VIN = 0 V or VDRIVE −1 +1 µA LOGIC OUTPUTS Output High Voltage (VOH) ISOURCE = 200 µA VDRIVE − 0.2 V Output Low Voltage (VOL) ISINK = 200 µA 0.4 V Floating State Leakage Current −1 +1 µA Output Coding Straight (natural) binary CONVERSION RATE Conversion Time 600 ns Transient Response Full-scale step input 400 ns Throughput Rate 1 MSPS Rev. 0 | Page 3 of 40 |
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